From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Chris Wilson" <chris@chris-wilson.co.uk>,
"Ramalingam C" <ramalingam.c@intel.com>
Subject: [Intel-gfx] [PATCH 1/2] drm/i915/gtt: flush the scratch page
Date: Fri, 22 Oct 2021 17:48:46 +0100 [thread overview]
Message-ID: <20211022164847.2632366-1-matthew.auld@intel.com> (raw)
The scratch page is directly visible in the users address space, and
while this is forced as CACHE_LLC, by the kernel, we still have to
contend with things like "Bypass-LLC" MOCS. So just flush no matter
what.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gtt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 67d14afa6623..b6c088423319 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -273,6 +273,7 @@ static void poison_scratch_page(struct drm_i915_gem_object *scratch)
val = POISON_FREE;
memset(vaddr, val, scratch->base.size);
+ clflush_cache_range(vaddr, scratch->base.size);
}
int setup_scratch_page(struct i915_address_space *vm)
--
2.26.3
next reply other threads:[~2021-10-22 16:50 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-22 16:48 Matthew Auld [this message]
2021-10-22 16:48 ` [Intel-gfx] [PATCH 2/2] drm/i915/gtt: stop caching the scratch page Matthew Auld
2021-10-26 10:17 ` Thomas Hellström
2021-10-22 21:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gtt: flush " Patchwork
2021-10-23 5:21 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-10-26 9:24 ` [Intel-gfx] [PATCH 1/2] " Thomas Hellström
2021-10-26 9:36 ` Thomas Hellström
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