From: "Navare, Manasi" <manasi.d.navare@intel.com>
To: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: intel-gfx@lists.freedesktop.org, jani.nikula@intel.com
Subject: Re: [Intel-gfx] [PATCH] drm/i915/dsc: Fix the usage of uncompressed bpp
Date: Wed, 27 Oct 2021 12:26:47 -0700 [thread overview]
Message-ID: <20211027192642.GA22973@labuser-Z97X-UD5H> (raw)
In-Reply-To: <20211027095316.9579-1-vandita.kulkarni@intel.com>
On Wed, Oct 27, 2021 at 03:23:16PM +0530, Vandita Kulkarni wrote:
> DP 1.4 spec limits max compression bpp to
> uncompressed bpp -1, which is supported from
> XELPD onwards.
> Instead of uncompressed bpp, max dsc input bpp
> was being used to limit the max compression bpp.
So the input Pipe BPP which is the uncompressed bpp is decided by the input bpc
and when this was initially written, we had designed it to respect the max_req_bpc by the user.
So that is what we use to decide the input bpc and hence the pipe_bpp
This input pipe_bpp decides the compressed bpp that we calculate based on all the supported output bpps
which are supported all the way upto uncompressed_output_bpp - 1.
So I dont see the need to change the logic here. Moreover I dont see any change in the dsc_compute_bpp function
So I dont understand the purpose of introducing the new max_dsc_pipe_bpp variable here
Manasi
>
> Fixes: 831d5aa96c97 ("drm/i915/xelpd: Support DP1.4 compression BPPs")
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9d8132dd4cc5..1f7e666ae490 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1322,7 +1322,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> const struct drm_display_mode *adjusted_mode =
> &pipe_config->hw.adjusted_mode;
> - int pipe_bpp;
> + int pipe_bpp, max_dsc_pipe_bpp;
> int ret;
>
> pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> @@ -1331,7 +1331,8 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> if (!intel_dp_supports_dsc(intel_dp, pipe_config))
> return -EINVAL;
>
> - pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
> + pipe_bpp = pipe_config->pipe_bpp;
> + max_dsc_pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
>
> /* Min Input BPC for ICL+ is 8 */
> if (pipe_bpp < 8 * 3) {
> @@ -1345,7 +1346,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> * Optimize this later for the minimum possible link rate/lane count
> * with DSC enabled for the requested mode.
> */
> - pipe_config->pipe_bpp = pipe_bpp;
> + pipe_config->pipe_bpp = max_dsc_pipe_bpp;
> pipe_config->port_clock = limits->max_rate;
> pipe_config->lane_count = limits->max_lane_count;
>
> --
> 2.32.0
>
next prev parent reply other threads:[~2021-10-27 19:14 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-27 9:53 [Intel-gfx] [PATCH] drm/i915/dsc: Fix the usage of uncompressed bpp Vandita Kulkarni
2021-10-27 14:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-10-27 18:02 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-27 19:26 ` Navare, Manasi [this message]
2021-10-28 4:37 ` [Intel-gfx] [PATCH] " Kulkarni, Vandita
2021-10-29 23:12 ` Navare, Manasi
2021-11-01 16:45 ` Kulkarni, Vandita
2021-11-02 4:40 ` Navare, Manasi
2021-11-02 4:35 ` Kulkarni, Vandita
2021-11-02 15:09 ` Navare, Manasi
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