From: Michael Cheng <michael.cheng@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: michael.cheng@intel.com, wayne.boyer@intel.com,
jani.nikula@intel.com, lucas.demarchi@intel.com,
dri-devel@lists.freedesktop.org, siva.mullati@intel.com
Subject: [Intel-gfx] [PATCH v5 0/1] Use i915 macros to check for PTEs
Date: Thu, 18 Nov 2021 12:54:31 -0800 [thread overview]
Message-ID: <20211118205432.579910-1-michael.cheng@intel.com> (raw)
Instead of using _PAGE_RW and _PAGE_PRESENT to check for 0 and 1 bits, this
series replaces them with GEN6_PTE_VALID and BYT_PTE_WRITEABLE. We should be using
macros defined for i915 to check these bits, instead of macros defined by the mmu.
Some arch does not have these macros defined, thus leading to compilation errors.
v2: Corrected sender's email.
v3: Corrected spelling error.
v4: Clean up a few other macros that are checking 0 and 1 bits.
v5: Instead of introducing new macros for checking 0 and 1 bits,
re-use already defined macros for i915.
Michael Cheng (1):
drm/i915: Re-use i915 macros for checking PTEs
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/gvt/gtt.c | 12 ++++++------
3 files changed, 10 insertions(+), 10 deletions(-)
--
2.25.1
next reply other threads:[~2021-11-18 20:54 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-18 20:54 Michael Cheng [this message]
2021-11-18 20:54 ` [Intel-gfx] [PATCH v5] drm/i915: Re-use i915 macros for checking PTEs Michael Cheng
2021-12-01 0:58 ` Lucas De Marchi
2021-11-18 22:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-11-18 22:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-01 18:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Re-use i915 macros for checking PTEs (rev7) Patchwork
2021-12-01 18:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-01 20:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Re-use i915 macros for checking PTEs (rev8) Patchwork
2021-12-01 20:50 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-01 22:29 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Re-use i915 macros for checking PTEs (rev9) Patchwork
2021-12-01 23:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-02 18:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Re-use i915 macros for checking PTEs (rev10) Patchwork
2021-12-02 19:11 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-02 19:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Re-use i915 macros for checking PTEs (rev11) Patchwork
2021-12-02 20:28 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-02 20:29 ` Cheng, Michael
2021-12-03 2:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Re-use i915 macros for checking PTEs (rev12) Patchwork
2021-12-03 2:47 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211118205432.579910-1-michael.cheng@intel.com \
--to=michael.cheng@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=lucas.demarchi@intel.com \
--cc=siva.mullati@intel.com \
--cc=wayne.boyer@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox