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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting
Date: Fri, 19 Nov 2021 06:09:31 -0800	[thread overview]
Message-ID: <20211119140931.32791-2-jose.souza@intel.com> (raw)
In-Reply-To: <20211119140931.32791-1-jose.souza@intel.com>

Those two workarounds needs to be implemented in UMD, KMD only needs
to whitelist the registers, so here only adding the workaround number
to facilitate future workaroud table checks.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index cd2935b9e7c81..c3211325c2d3e 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1869,7 +1869,11 @@ static void tgl_whitelist_build(struct intel_engine_cs *engine)
 				  RING_FORCE_TO_NONPRIV_ACCESS_RD |
 				  RING_FORCE_TO_NONPRIV_RANGE_4);
 
-		/* Wa_1808121037:tgl */
+		/*
+		 * Wa_1808121037:tgl
+		 * Wa_14012131227:dg1
+		 * Wa_1508744258:tgl,rkl,dg1,adl-s,adl-p
+		 */
 		whitelist_reg(w, GEN7_COMMON_SLICE_CHICKEN1);
 
 		/* Wa_1806527549:tgl */
-- 
2.33.1


  reply	other threads:[~2021-11-19 14:09 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-19 14:09 [Intel-gfx] [PATCH 1/2] Revert "drm/i915: Implement Wa_1508744258" José Roberto de Souza
2021-11-19 14:09 ` José Roberto de Souza [this message]
2021-12-01 16:56   ` [Intel-gfx] [PATCH 2/2] drm/i915: Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting Matt Atwood
2021-11-19 14:13 ` [Intel-gfx] [PATCH 1/2] Revert "drm/i915: Implement Wa_1508744258" Souza, Jose
2021-11-30 23:19   ` Matt Atwood
2021-11-19 17:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2021-11-20  0:13 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-12-01 14:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] Revert "drm/i915: Implement Wa_1508744258" (rev2) Patchwork
2021-12-01 18:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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