From: Dan Carpenter <dan.carpenter@oracle.com>
To: Zhenyu Wang <zhenyuw@linux.intel.com>, Zhi Wang <zhi.a.wang@intel.com>
Cc: David Airlie <airlied@linux.ie>,
intel-gfx@lists.freedesktop.org, kernel-janitors@vger.kernel.org,
dri-devel@lists.freedesktop.org,
intel-gvt-dev@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915/gvt: Prevent integer overflow in intel_vgpu_emulate_cfg_write()
Date: Wed, 24 Nov 2021 17:49:13 +0300 [thread overview]
Message-ID: <20211124144913.GA13656@kili> (raw)
The "offset" is a u32 that comes from the user. The bug is that the
"offset + bytes" operation can have an integer overflow problem which
leads to an out of bounds access.
Fixes: 4d60c5fd3f87 ("drm/i915/gvt: vGPU PCI configuration space virtualization")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
---
drivers/gpu/drm/i915/gvt/cfg_space.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gvt/cfg_space.c b/drivers/gpu/drm/i915/gvt/cfg_space.c
index b490e3db2e38..8a54dd3de91c 100644
--- a/drivers/gpu/drm/i915/gvt/cfg_space.c
+++ b/drivers/gpu/drm/i915/gvt/cfg_space.c
@@ -316,6 +316,10 @@ int intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset,
if (drm_WARN_ON(&i915->drm, bytes > 4))
return -EINVAL;
+ if (drm_WARN_ON(&i915->drm,
+ offset > vgpu->gvt->device_info.cfg_space_size))
+ return -EINVAL;
+
if (drm_WARN_ON(&i915->drm,
offset + bytes > vgpu->gvt->device_info.cfg_space_size))
return -EINVAL;
--
2.20.1
next reply other threads:[~2021-11-24 14:49 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-24 14:49 Dan Carpenter [this message]
2021-11-24 17:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gvt: Prevent integer overflow in intel_vgpu_emulate_cfg_write() Patchwork
2021-11-24 19:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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