From: Ramalingam C <ramalingam.c@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel <dri-devel@lists.freedesktop.org>
Cc: Andi <andi.shyti@intel.com>,
Lucas De Marchi <lucas.demarchi@intel.com>,
Chris_intel_ID <chris.p.wilson@intel.com>,
Hellstrom Thomas <thomas.hellstrom@intel.com>
Subject: [Intel-gfx] [PATCH 1/4] drm/i915: Add has_64k_pages flag
Date: Tue, 7 Dec 2021 22:21:53 +0530 [thread overview]
Message-ID: <20211207165156.31244-2-ramalingam.c@intel.com> (raw)
In-Reply-To: <20211207165156.31244-1-ramalingam.c@intel.com>
From: Stuart Summers <stuart.summers@intel.com>
Add a new platform flag, has_64k_pages, for platforms supporting
base page sizes of 64k.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 2 ++
drivers/gpu/drm/i915/intel_device_info.h | 1 +
3 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 85bb8d3107f0..6132163e1cb3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1528,6 +1528,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_MSLICES(dev_priv) \
(INTEL_INFO(dev_priv)->has_mslices)
+#define HAS_64K_PAGES(dev_priv) (INTEL_INFO(dev_priv)->has_64k_pages)
+
#define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc)
#define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 6aaa7c644c9b..634282edadb7 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1029,6 +1029,7 @@ static const struct intel_device_info xehpsdv_info = {
DGFX_FEATURES,
PLATFORM(INTEL_XEHPSDV),
.display = { },
+ .has_64k_pages = 1,
.pipe_mask = 0,
.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) |
@@ -1047,6 +1048,7 @@ static const struct intel_device_info dg2_info = {
.graphics.rel = 55,
.media.rel = 55,
PLATFORM(INTEL_DG2),
+ .has_64k_pages = 1,
.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) |
BIT(VECS0) | BIT(VECS1) |
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 669f0d26c3c3..f38ac5bd837b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -123,6 +123,7 @@ enum intel_ppgtt_type {
func(is_dgfx); \
/* Keep has_* in alphabetical order */ \
func(has_64bit_reloc); \
+ func(has_64k_pages); \
func(gpu_reset_clobbers_display); \
func(has_reset_engine); \
func(has_global_mocs); \
--
2.20.1
next prev parent reply other threads:[~2021-12-07 16:52 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-07 16:51 [Intel-gfx] [PATCH 0/4] Basic enabling of 64k page support Ramalingam C
2021-12-07 16:51 ` Ramalingam C [this message]
2021-12-08 12:43 ` [Intel-gfx] [PATCH 1/4] drm/i915: Add has_64k_pages flag Thomas Hellström (Intel)
2021-12-08 12:59 ` Matthew Auld
2021-12-08 13:22 ` Thomas Hellström (Intel)
2021-12-07 16:51 ` [Intel-gfx] [PATCH 2/4] drm/i915/xehpsdv: set min page-size to 64K Ramalingam C
2021-12-08 12:50 ` Thomas Hellström (Intel)
2021-12-07 16:51 ` [Intel-gfx] [PATCH 3/4] drm/i915/gtt/xehpsdv: move scratch page to system memory Ramalingam C
2021-12-08 13:26 ` Thomas Hellström
2021-12-07 16:51 ` [Intel-gfx] [PATCH 4/4] drm/i915: enforce min page size for scratch Ramalingam C
2021-12-08 13:32 ` Thomas Hellström
2021-12-07 20:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Basic enabling of 64k page support Patchwork
2021-12-07 20:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-08 3:46 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2021-12-08 14:16 [Intel-gfx] [PATCH 0/4] drm/i915: " Ramalingam C
2021-12-08 14:16 ` [Intel-gfx] [PATCH 1/4] drm/i915: Add has_64k_pages flag Ramalingam C
2021-12-08 16:08 ` Andi Shyti
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