Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Ramalingam C <ramalingam.c@intel.com>
To: dri-devel <dri-devel@lists.freedesktop.org>,
	intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: Simon Ser <contact@emersion.fr>,
	Kenneth Graunke <kenneth@whitecape.org>,
	Slawomir Milczarek <slawomir.milczarek@intel.com>,
	Pekka Paalanen <ppaalanen@gmail.com>,
	Matthew Auld <matthew.auld@intel.com>,
	mesa-dev@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 18/19] drm/i915/Flat-CCS: Document on Flat-CCS memory compression
Date: Tue,  1 Feb 2022 16:11:31 +0530	[thread overview]
Message-ID: <20220201104132.3050-19-ramalingam.c@intel.com> (raw)
In-Reply-To: <20220201104132.3050-1-ramalingam.c@intel.com>

Documents the Flat-CCS feature and kernel handling required along with
modifiers used.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Simon Ser <contact@emersion.fr>
cc: Pekka Paalanen <ppaalanen@gmail.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-dev@lists.freedesktop.org
Cc: Tony Ye <tony.ye@intel.com>
Cc: Slawomir Milczarek <slawomir.milczarek@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 47 +++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 3e1cf224cdf0..5bdab0b3c735 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -596,6 +596,53 @@ intel_context_migrate_copy(struct intel_context *ce,
 	return err;
 }
 
+/**
+ * DOC: Flat-CCS - Memory compression for Local memory
+ *
+ * On Xe-HP and later devices, we use dedicated compression control state (CCS)
+ * stored in local memory for each surface, to support the 3D and media
+ * compression formats.
+ *
+ * The memory required for the CCS of the entire local memory is 1/256 of the
+ * local memory size. So before the kernel boot, the required memory is reserved
+ * for the CCS data and a secure register will be programmed with the CCS base
+ * address.
+ *
+ * Flat CCS data needs to be cleared when a lmem object is allocated.
+ * And CCS data can be copied in and out of CCS region through
+ * XY_CTRL_SURF_COPY_BLT. CPU can't access the CCS data directly.
+ *
+ * When we exaust the lmem, if the object's placements support smem, then we can
+ * directly decompress the compressed lmem object into smem and start using it
+ * from smem itself.
+ *
+ * But when we need to swapout the compressed lmem object into a smem region
+ * though objects' placement doesn't support smem, then we copy the lmem content
+ * as it is into smem region along with ccs data (using XY_CTRL_SURF_COPY_BLT).
+ * When the object is referred, lmem content will be swaped in along with
+ * restoration of the CCS data (using XY_CTRL_SURF_COPY_BLT) at corresponding
+ * location.
+ *
+ *
+ * Flat-CCS Modifiers for different compression formats
+ * ----------------------------------------------------
+ *
+ * I915_FORMAT_MOD_F_TILED_DG2_RC_CCS - used to indicate the buffers of Flat CCS
+ * render compression formats. Though the general layout is same as
+ * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, new hashing/compression algorithm is
+ * used. Render compression uses 128 byte compression blocks
+ *
+ * I915_FORMAT_MOD_F_TILED_DG2_MC_CCS -used to indicate the buffers of Flat CCS
+ * media compression formats. Though the general layout is same as
+ * I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS, new hashing/compression algorithm is
+ * used. Media compression uses 256 byte compression blocks.
+ *
+ * I915_FORMAT_MOD_F_TILED_DG2_RC_CCS_CC - used to indicate the buffers of Flat
+ * CCS clear color render compression formats. Unified compression format for
+ * clear color render compression. The genral layout is a tiled layout using
+ * 4Kb tiles i.e Tile4 layout.
+ */
+
 static inline u32 *i915_flush_dw(u32 *cmd, u64 dst, u32 flags)
 {
 	/* Mask the 3 LSB to use the PPGTT address space */
-- 
2.20.1


  parent reply	other threads:[~2022-02-01 10:42 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-01 10:41 [Intel-gfx] [PATCH v5 00/19] drm/i915/dg2: Enabling 64k page size and flat ccs Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 01/19] drm/i915: add needs_compact_pt flag Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 02/19] drm/i915: enforce min GTT alignment for discrete cards Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 03/19] drm/i915: support 64K GTT pages " Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 04/19] drm/i915: add gtt misalignment test Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 05/19] drm/i915/gtt: allow overriding the pt alignment Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 06/19] drm/i915/gtt: add xehpsdv_ppgtt_insert_entry Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 07/19] drm/i915/migrate: add acceleration support for DG2 Ramalingam C
2022-02-01 10:49   ` Matthew Auld
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 08/19] drm/i915/uapi: document behaviour for DG2 64K support Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 09/19] Doc/gpu/rfc/i915: i915 DG2 64k pagesize uAPI Ramalingam C
2022-02-18  5:39   ` Lucas De Marchi
2022-02-18  8:20     ` Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 10/19] drm/i915/xehpsdv: Add has_flat_ccs to device info Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 11/19] drm/i915/lmem: Enable lmem for platforms with Flat CCS Ramalingam C
2022-02-18 10:08   ` Lucas De Marchi
2022-02-18 10:17     ` Lucas De Marchi
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 12/19] drm/i915/gt: Clear compress metadata for Xe_HP platforms Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 13/19] drm/i915: Introduce new Tile 4 format Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 14/19] drm/i915/dg2: Tile 4 plane format support Ramalingam C
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 15/19] drm/i915/dg2: Add DG2 unified compression Ramalingam C
2022-02-12  1:17   ` Nanley Chery
2022-02-15 14:53     ` Juha-Pekka Heikkila
2022-02-17 17:15       ` Chery, Nanley G
2022-03-18 17:39         ` Imre Deak
2022-03-23 23:40           ` Chery, Nanley G
2022-03-24 14:19             ` Imre Deak
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 16/19] uapi/drm/dg2: Introduce format modifier for DG2 clear color Ramalingam C
2022-02-12  1:19   ` Nanley Chery
2022-02-15 14:55     ` Juha-Pekka Heikkila
2022-02-15 15:02       ` Chery, Nanley G
2022-02-15 16:15         ` Juha-Pekka Heikkila
2022-02-15 16:44           ` Chery, Nanley G
2022-02-15 17:31             ` Juha-Pekka Heikkila
2022-02-15 18:24               ` Chery, Nanley G
2022-02-15 19:34                 ` Juha-Pekka Heikkila
2022-03-21 13:20                   ` Imre Deak
2022-03-23 23:42                     ` Chery, Nanley G
2022-03-24 14:45                       ` Imre Deak
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 17/19] drm/i915/dg2: Flat CCS Support Ramalingam C
2022-03-24 16:16   ` Imre Deak
2022-02-01 10:41 ` Ramalingam C [this message]
2022-02-01 10:41 ` [Intel-gfx] [PATCH v5 19/19] Doc/gpu/rfc/i915: i915 DG2 flat-CCS uAPI Ramalingam C
2022-02-01 12:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dg2: Enabling 64k page size and flat ccs (rev5) Patchwork
2022-02-01 12:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-01 13:15 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-02-18 19:04 ` [Intel-gfx] [PATCH v5 00/19] drm/i915/dg2: Enabling 64k page size and flat ccs Ramalingam C

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220201104132.3050-19-ramalingam.c@intel.com \
    --to=ramalingam.c@intel.com \
    --cc=contact@emersion.fr \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=kenneth@whitecape.org \
    --cc=matthew.auld@intel.com \
    --cc=mesa-dev@lists.freedesktop.org \
    --cc=ppaalanen@gmail.com \
    --cc=slawomir.milczarek@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox