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From: Ramalingam C <ramalingam.c@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel <dri-devel@lists.freedesktop.org>
Cc: Matthew Auld <matthew.auld@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915/perf: Skip the i915_perf_init for dg2
Date: Tue, 15 Feb 2022 11:01:15 +0530	[thread overview]
Message-ID: <20220215053115.6023-1-ramalingam.c@intel.com> (raw)

i915_perf is not enabled for dg2 yet, hence skip the feature
initialization.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/i915/i915_perf.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 36f1325baa7d..5ac9604d07b3 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -4373,6 +4373,10 @@ void i915_perf_init(struct drm_i915_private *i915)
 
 	/* XXX const struct i915_perf_ops! */
 
+	/* i915_perf is not enabled for DG2 yet */
+	if (IS_DG2(i915))
+		return;
+
 	perf->oa_formats = oa_formats;
 	if (IS_HASWELL(i915)) {
 		perf->ops.is_valid_b_counter_reg = gen7_is_valid_b_counter_addr;
-- 
2.20.1


             reply	other threads:[~2022-02-15  5:31 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-15  5:31 Ramalingam C [this message]
2022-02-15 13:03 ` [Intel-gfx] [PATCH] drm/i915/perf: Skip the i915_perf_init for dg2 Matthew Auld
2022-02-16  4:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2022-02-16 10:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-17  8:08   ` Ramalingam C
2022-02-17 19:13 ` [Intel-gfx] [PATCH] " Umesh Nerlige Ramappa

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