From: Matt Atwood <matthew.s.atwood@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>;, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/6] drm/i915/gt: Drop duplicate register definition for VDBOX_CGCTL3F18
Date: Tue, 15 Feb 2022 13:23:12 -0800 [thread overview]
Message-ID: <20220215212312.GA12259@msatwood-mobl> (raw)
In-Reply-To: <20220209051140.1599643-2-matthew.d.roper@intel.com>
On Tue, Feb 08, 2022 at 09:11:35PM -0800, Matt Roper wrote:
> Due to some mistaken merge conflict resolution, we wound up with a copy
> of VDBOX_CGCTL3F18 in both intel_engine_regs.h and intel_gt_regs.h.
> Since this is a per-engine register, referenced relative to an engine's
> base offset, drop the copy from intel_gt_regs.h
>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index a6f0220c2e9f..e73c706e7f0d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> @@ -368,9 +368,6 @@
> #define NOPID _MMIO(0x2094)
> #define HWSTAM _MMIO(0x2098)
>
> -#define VDBOX_CGCTL3F18(base) _MMIO((base) + 0x3f18)
> -#define ALNUNIT_CLKGATE_DIS REG_BIT(13)
> -
> #define ERROR_GEN6 _MMIO(0x40a0)
>
> #define GEN8_FAULT_TLB_DATA0 _MMIO(0x4b10)
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-02-15 21:23 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-09 5:11 [Intel-gfx] [PATCH 0/6] More GT register cleanup Matt Roper
2022-02-09 5:11 ` [Intel-gfx] [PATCH 1/6] drm/i915/gt: Drop duplicate register definition for VDBOX_CGCTL3F18 Matt Roper
2022-02-15 21:23 ` Matt Atwood [this message]
2022-02-09 5:11 ` [Intel-gfx] [PATCH 2/6] drm/i915/gt: Move SFC lock bits to intel_engine_regs.h Matt Roper
2022-02-15 21:28 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 3/6] drm/i915/gt: Use parameterized RING_MI_MODE Matt Roper
2022-02-15 21:33 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 4/6] drm/i915/gt: Cleanup spacing of intel_gt_regs.h Matt Roper
2022-02-15 22:03 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 5/6] drm/i915/gt: Use consistent offset notation in intel_gt_regs.h Matt Roper
2022-02-15 21:49 ` Matt Atwood
2022-02-09 5:11 ` [Intel-gfx] [PATCH 6/6] drm/i915/gt: Order GT registers by MMIO offset Matt Roper
2022-02-09 8:11 ` Ville Syrjälä
2022-02-15 22:42 ` Matt Atwood
2022-02-09 5:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More GT register cleanup Patchwork
2022-02-09 5:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-09 5:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-09 7:07 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-16 20:50 ` Matt Roper
2022-02-10 14:26 ` [Intel-gfx] [PATCH 0/6] " Jani Nikula
2022-02-10 14:27 ` Jani Nikula
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