From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [Intel-gfx] [CI 2/4] drm/i915/dsi: add separate init timer mask definition for ICL DSI
Date: Fri, 18 Feb 2022 00:40:21 +0200 [thread overview]
Message-ID: <20220217224023.3994777-2-jani.nikula@intel.com> (raw)
In-Reply-To: <20220217224023.3994777-1-jani.nikula@intel.com>
Having a separate definition will be useful for splitting VLV and ICL
register files.
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 479d5e1165d9..3c01565e62b2 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -570,7 +570,7 @@ gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder,
/* Program T-INIT master registers */
for_each_dsi_port(port, intel_dsi->ports) {
tmp = intel_de_read(dev_priv, ICL_DSI_T_INIT_MASTER(port));
- tmp &= ~MASTER_INIT_TIMER_MASK;
+ tmp &= ~DSI_T_INIT_MASTER_MASK;
tmp |= intel_dsi->init_count;
intel_de_write(dev_priv, ICL_DSI_T_INIT_MASTER(port), tmp);
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2243d9d1d941..1fe4be8d475c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9001,6 +9001,7 @@ enum skl_power_gate {
#define ICL_DSI_T_INIT_MASTER(port) _MMIO_PORT(port, \
_ICL_DSI_T_INIT_MASTER_0,\
_ICL_DSI_T_INIT_MASTER_1)
+#define DSI_T_INIT_MASTER_MASK REG_GENMASK(15, 0)
#define _DPHY_CLK_TIMING_PARAM_0 0x162180
#define _DPHY_CLK_TIMING_PARAM_1 0x6c180
--
2.30.2
next prev parent reply other threads:[~2022-02-17 22:40 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-17 22:40 [Intel-gfx] [CI 1/4] drm/i915/dsi: disassociate VBT video transfer mode from register values Jani Nikula
2022-02-17 22:40 ` Jani Nikula [this message]
2022-02-17 22:40 ` [Intel-gfx] [CI 3/4] drm/i915/reg: split out vlv_dsi_regs.h and vlv_dsi_pll_regs.h Jani Nikula
2022-02-17 22:40 ` [Intel-gfx] [CI 4/4] drm/i915/reg: split out icl_dsi_regs.h Jani Nikula
2022-02-18 4:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915/dsi: disassociate VBT video transfer mode from register values Patchwork
2022-02-18 4:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-18 5:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-18 16:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-02-21 11:05 ` [Intel-gfx] [CI 1/4] " Jani Nikula
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