From: Matthew Auld <matthew.auld@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH i-g-t v2 4/6] lib/i915: add gem_create_with_cpu_access_in_memory_regions
Date: Mon, 21 Feb 2022 14:16:18 +0000 [thread overview]
Message-ID: <20220221141620.2490914-5-matthew.auld@intel.com> (raw)
In-Reply-To: <20220221141620.2490914-1-matthew.auld@intel.com>
Most users shouldn't care about such an interface, but where required,
this should be useful to aid in setting NEEDS_CPU_ACCESS for a given BO.
Underneath we try to smooth over needing to provide an explicit SMEM
region, or if this is SMEM-only, we don't want the kernel to throw an
error.
Put it to use in gem_exec_capture, where a proper hint is now required
by the kernel on DG2+, for objects marked with EXEC_OBJECT_CAPTURE, that
can also be placed in LMEM.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
lib/i915/intel_memory_region.c | 10 +++++---
lib/i915/intel_memory_region.h | 46 +++++++++++++++++++++++++++++++---
tests/i915/gem_exec_capture.c | 6 ++---
tests/i915/gem_lmem_swapping.c | 2 +-
4 files changed, 52 insertions(+), 12 deletions(-)
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index f0c8bc7c..4893c5ba 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -197,7 +197,7 @@ bool gem_has_lmem(int fd)
/* A version of gem_create_in_memory_region_list which can be allowed to
fail so that the object creation can be retried */
-int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size,
+int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size, uint32_t flags,
struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions)
{
@@ -208,7 +208,9 @@ int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size,
};
int ret;
- ret = __gem_create_ext(fd, size, 0, handle, &ext_regions.base);
+ ret = __gem_create_ext(fd, size, flags, handle, &ext_regions.base);
+ if (flags && ret == -EINVAL)
+ ret = __gem_create_ext(fd, size, 0, handle, &ext_regions.base);
/*
* Provide fallback for stable kernels if region passed in the array
@@ -231,12 +233,12 @@ int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size,
* @mem_regions: memory regions array (priority list)
* @num_regions: @mem_regions length
*/
-uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
+uint32_t gem_create_in_memory_region_list(int fd, uint64_t size, uint32_t flags,
struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions)
{
uint32_t handle;
- int ret = __gem_create_in_memory_region_list(fd, &handle, &size,
+ int ret = __gem_create_in_memory_region_list(fd, &handle, &size, flags,
mem_regions, num_regions);
igt_assert_eq(ret, 0);
return handle;
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index 936e7d1c..7cc119ec 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -21,6 +21,7 @@
* IN THE SOFTWARE.
*/
#include "igt_collection.h"
+#include "i915_drm_local.h"
#ifndef INTEL_MEMORY_REGION_H
#define INTEL_MEMORY_REGION_H
@@ -64,11 +65,11 @@ bool gem_has_lmem(int fd);
struct drm_i915_gem_memory_class_instance;
-int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size,
+int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size, uint32_t flags,
struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions);
-uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
+uint32_t gem_create_in_memory_region_list(int fd, uint64_t size, uint32_t flags,
struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions);
@@ -84,7 +85,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
} \
- __gem_create_in_memory_region_list(fd, handle, size, arr_query__, ARRAY_SIZE(arr_query__)); \
+ __gem_create_in_memory_region_list(fd, handle, size, 0, arr_query__, ARRAY_SIZE(arr_query__)); \
})
#define gem_create_in_memory_regions(fd, size, regions...) ({ \
unsigned int arr__[] = { regions }; \
@@ -93,7 +94,44 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
} \
- gem_create_in_memory_region_list(fd, size, arr_query__, ARRAY_SIZE(arr_query__)); \
+ gem_create_in_memory_region_list(fd, size, 0, arr_query__, ARRAY_SIZE(arr_query__)); \
+})
+
+/*
+ * Create an object that requires CPU access. This only becomes interesting on
+ * platforms that have a small BAR for LMEM CPU access. Without this the object
+ * might need to be migrated when CPU faulting the object, or if that is not
+ * possible we hit SIGBUS. Most users should be fine with this. If enabled the
+ * kernel will never allocate this object in the non-CPU visible portion of
+ * LMEM.
+ *
+ * Underneath this just enables the I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS
+ * flag, if we also have an LMEM placement. Also since the kernel requires SMEM
+ * as a potential placement, we automatically attach that as a possible
+ * placement, if not already provided. If this happens to be an SMEM-only
+ * placement then we don't supply the flag, and instead just treat as normal
+ * allocation.
+ */
+#define gem_create_with_cpu_access_in_memory_regions(fd, size, regions...) ({ \
+ unsigned int arr__[] = { regions }; \
+ struct drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__) + 1]; \
+ int i__, arr_query_size__ = ARRAY_SIZE(arr__); \
+ uint32_t ext_flags__ = 0; \
+ bool ext_found_smem__ = false; \
+ for (i__ = 0; i__ < arr_query_size__; ++i__) { \
+ arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
+ if (arr_query__[i__].memory_class == I915_MEMORY_CLASS_DEVICE) \
+ ext_flags__ = I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS; \
+ else \
+ ext_found_smem__ = true; \
+ arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
+ } \
+ if (ext_flags__ && !ext_found_smem__) { \
+ arr_query__[i__].memory_class = I915_MEMORY_CLASS_SYSTEM; \
+ arr_query__[i__].memory_instance = 0; \
+ arr_query_size__++; \
+ } \
+ gem_create_in_memory_region_list(fd, size, ext_flags__, arr_query__, arr_query_size__); \
})
struct igt_collection *
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 60f8df04..24ba6036 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -268,7 +268,7 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved_engine = configure_hangs(fd, e, ctx->id);
memset(obj, 0, sizeof(obj));
- obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[SCRATCH].handle = gem_create_with_cpu_access_in_memory_regions(fd, 4096, region);
obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
obj[CAPTURE].handle = target;
obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
@@ -387,9 +387,9 @@ static void capture(int fd, int dir, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e, uint32_t region)
{
uint32_t handle;
- uint64_t ahnd, obj_size = 4096;
+ uint64_t ahnd, obj_size = 16 * 4096;
- igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
+ handle = gem_create_with_cpu_access_in_memory_regions(fd, obj_size, region);
ahnd = get_reloc_ahnd(fd, ctx->id);
__capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
diff --git a/tests/i915/gem_lmem_swapping.c b/tests/i915/gem_lmem_swapping.c
index 39f9e1f5..18b66f09 100644
--- a/tests/i915/gem_lmem_swapping.c
+++ b/tests/i915/gem_lmem_swapping.c
@@ -80,7 +80,7 @@ static uint32_t create_bo(int i915,
int ret;
retry:
- ret = __gem_create_in_memory_region_list(i915, &handle, &size, region, 1);
+ ret = __gem_create_in_memory_region_list(i915, &handle, &size, 0, region, 1);
if (do_oom_test && ret == -ENOMEM)
goto retry;
igt_assert_eq(ret, 0);
--
2.34.1
next prev parent reply other threads:[~2022-02-21 14:16 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-21 14:16 [Intel-gfx] [PATCH i-g-t v2 0/6] Exercise NEEDS_CPU_ACCESS Matthew Auld
2022-02-21 14:16 ` [Intel-gfx] [PATCH i-g-t v2 1/6] lib/i915_drm_local: Add I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS Matthew Auld
2022-02-21 14:16 ` [Intel-gfx] [PATCH i-g-t v2 2/6] lib/i915: wire up optional flags for gem_create_ext Matthew Auld
2022-02-21 14:16 ` [Intel-gfx] [PATCH i-g-t v2 3/6] tests/i915/gem_create: test NEEDS_CPU_ACCESS Matthew Auld
2022-02-21 14:16 ` Matthew Auld [this message]
2022-02-21 14:16 ` [Intel-gfx] [PATCH i-g-t v2 5/6] i915/tests/capture: add a negative test for NEEDS_CPU_ACCESS Matthew Auld
2022-02-21 14:16 ` [Intel-gfx] [PATCH i-g-t v2 6/6] lib/i915: request CPU_ACCESS for fb objects Matthew Auld
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220221141620.2490914-5-matthew.auld@intel.com \
--to=matthew.auld@intel.com \
--cc=igt-dev@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=thomas.hellstrom@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox