From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH 8/8] drm/i915: Move intel_display_power_well_is_enabled() to intel_display_power_well.c
Date: Tue, 22 Feb 2022 18:51:37 +0200 [thread overview]
Message-ID: <20220222165137.1004194-9-imre.deak@intel.com> (raw)
In-Reply-To: <20220222165137.1004194-1-imre.deak@intel.com>
Move intel_display_power_well_is_enabled() to intel_power_well.c, as a step
towards making the low-level power well internals (i915_power_well_ops/desc
structs) hidden.
Eventually the call to this function and in general accessing power
wells directly from elsewhere in the driver should be replaced by the
use of power domains.
No functional change.
Suggested-by: Jani Nikula <jani.nikula@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
---
.../drm/i915/display/intel_display_debugfs.c | 1 +
.../drm/i915/display/intel_display_power.c | 36 -------------------
.../drm/i915/display/intel_display_power.h | 26 --------------
.../i915/display/intel_display_power_well.c | 33 +++++++++++++++++
.../i915/display/intel_display_power_well.h | 31 +++++++++++++++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 1 +
6 files changed, 65 insertions(+), 63 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 695aa6efe8c1b..c3504b6a6b3c7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -10,6 +10,7 @@
#include "intel_de.h"
#include "intel_display_debugfs.h"
#include "intel_display_power.h"
+#include "intel_display_power_well.h"
#include "intel_display_types.h"
#include "intel_dmc.h"
#include "intel_dp.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index a7aa4a4277236..e8e8ce13aa960 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -27,9 +27,6 @@
#include "intel_vga.h"
#include "vlv_sideband.h"
-bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
- enum i915_power_well_id power_well_id);
-
const char *
intel_display_power_domain_str(enum intel_display_power_domain domain)
{
@@ -918,29 +915,6 @@ static void assert_dmc_loaded(struct drm_i915_private *dev_priv)
"DMC HTP Not fine\n");
}
-static struct i915_power_well *
-lookup_power_well(struct drm_i915_private *dev_priv,
- enum i915_power_well_id power_well_id)
-{
- struct i915_power_well *power_well;
-
- for_each_power_well(dev_priv, power_well)
- if (power_well->desc->id == power_well_id)
- return power_well;
-
- /*
- * It's not feasible to add error checking code to the callers since
- * this condition really shouldn't happen and it doesn't even make sense
- * to abort things like display initialization sequences. Just return
- * the first power well and hope the WARN gets reported so we can fix
- * our driver.
- */
- drm_WARN(&dev_priv->drm, 1,
- "Power well %d not defined for this platform\n",
- power_well_id);
- return &dev_priv->power_domains.power_wells[0];
-}
-
/**
* intel_display_power_set_target_dc_state - Set target dc state.
* @dev_priv: i915 device
@@ -3330,16 +3304,6 @@ static const struct i915_power_well_desc chv_power_wells[] = {
},
};
-bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
- enum i915_power_well_id power_well_id)
-{
- struct i915_power_well *power_well;
-
- power_well = lookup_power_well(dev_priv, power_well_id);
-
- return intel_power_well_is_enabled(dev_priv, power_well);
-}
-
static const struct i915_power_well_desc skl_power_wells[] = {
{
.name = "always-on",
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index f28aa4b500c42..ced384b0a1658 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -132,30 +132,6 @@ enum intel_display_power_domain {
POWER_DOMAIN_NUM,
};
-/*
- * i915_power_well_id:
- *
- * IDs used to look up power wells. Power wells accessed directly bypassing
- * the power domains framework must be assigned a unique ID. The rest of power
- * wells must be assigned DISP_PW_ID_NONE.
- */
-enum i915_power_well_id {
- DISP_PW_ID_NONE,
-
- VLV_DISP_PW_DISP2D,
- BXT_DISP_PW_DPIO_CMN_A,
- VLV_DISP_PW_DPIO_CMN_BC,
- GLK_DISP_PW_DPIO_CMN_C,
- CHV_DISP_PW_DPIO_CMN_D,
- HSW_DISP_PW_GLOBAL,
- SKL_DISP_PW_MISC_IO,
- SKL_DISP_PW_1,
- SKL_DISP_PW_2,
- ICL_DISP_PW_3,
- SKL_DISP_DC_OFF,
- TGL_DISP_PW_TC_COLD_OFF,
-};
-
#define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A)
#define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \
((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER)
@@ -239,8 +215,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain);
bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
-bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
- enum i915_power_well_id power_well_id);
bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 415ad193a8e83..2a0fb9d9c60f2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -6,6 +6,29 @@
#include "i915_drv.h"
#include "intel_display_power_well.h"
+struct i915_power_well *
+lookup_power_well(struct drm_i915_private *i915,
+ enum i915_power_well_id power_well_id)
+{
+ struct i915_power_well *power_well;
+
+ for_each_power_well(i915, power_well)
+ if (power_well->desc->id == power_well_id)
+ return power_well;
+
+ /*
+ * It's not feasible to add error checking code to the callers since
+ * this condition really shouldn't happen and it doesn't even make sense
+ * to abort things like display initialization sequences. Just return
+ * the first power well and hope the WARN gets reported so we can fix
+ * our driver.
+ */
+ drm_WARN(&i915->drm, 1,
+ "Power well %d not defined for this platform\n",
+ power_well_id);
+ return &i915->power_domains.power_wells[0];
+}
+
void intel_power_well_enable(struct drm_i915_private *i915,
struct i915_power_well *power_well)
{
@@ -59,6 +82,16 @@ bool intel_power_well_is_enabled_cached(struct i915_power_well *power_well)
return power_well->hw_enabled;
}
+bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
+ enum i915_power_well_id power_well_id)
+{
+ struct i915_power_well *power_well;
+
+ power_well = lookup_power_well(dev_priv, power_well_id);
+
+ return intel_power_well_is_enabled(dev_priv, power_well);
+}
+
bool intel_power_well_is_always_on(struct i915_power_well *power_well)
{
return power_well->desc->always_on;
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.h b/drivers/gpu/drm/i915/display/intel_display_power_well.h
index 43affbdbc48c1..9a3756fdcf7fc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.h
@@ -8,9 +8,33 @@
#include <linux/types.h>
#include "intel_display.h"
-#include "intel_display_power.h"
struct drm_i915_private;
+struct i915_power_well;
+
+/*
+ * i915_power_well_id:
+ *
+ * IDs used to look up power wells. Power wells accessed directly bypassing
+ * the power domains framework must be assigned a unique ID. The rest of power
+ * wells must be assigned DISP_PW_ID_NONE.
+ */
+enum i915_power_well_id {
+ DISP_PW_ID_NONE,
+
+ VLV_DISP_PW_DISP2D,
+ BXT_DISP_PW_DPIO_CMN_A,
+ VLV_DISP_PW_DPIO_CMN_BC,
+ GLK_DISP_PW_DPIO_CMN_C,
+ CHV_DISP_PW_DPIO_CMN_D,
+ HSW_DISP_PW_GLOBAL,
+ SKL_DISP_PW_MISC_IO,
+ SKL_DISP_PW_1,
+ SKL_DISP_PW_2,
+ ICL_DISP_PW_3,
+ SKL_DISP_DC_OFF,
+ TGL_DISP_PW_TC_COLD_OFF,
+};
struct i915_power_well_regs {
i915_reg_t bios;
@@ -103,6 +127,9 @@ struct i915_power_well {
bool hw_enabled;
};
+struct i915_power_well *lookup_power_well(struct drm_i915_private *i915,
+ enum i915_power_well_id id);
+
void intel_power_well_enable(struct drm_i915_private *i915,
struct i915_power_well *power_well);
void intel_power_well_disable(struct drm_i915_private *i915,
@@ -116,6 +143,8 @@ void intel_power_well_put(struct drm_i915_private *i915,
bool intel_power_well_is_enabled(struct drm_i915_private *i915,
struct i915_power_well *power_well);
bool intel_power_well_is_enabled_cached(struct i915_power_well *power_well);
+bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
+ enum i915_power_well_id power_well_id);
bool intel_power_well_is_always_on(struct i915_power_well *power_well);
const char *intel_power_well_name(struct i915_power_well *power_well);
u64 intel_power_well_domains(struct i915_power_well *power_well);
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index e1ecf38db0ef8..4de4c174a987d 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -20,6 +20,7 @@
#include "intel_connector.h"
#include "intel_de.h"
#include "intel_display_power.h"
+#include "intel_display_power_well.h"
#include "intel_display_types.h"
#include "intel_hdcp.h"
#include "intel_pcode.h"
--
2.27.0
next prev parent reply other threads:[~2022-02-22 16:52 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-22 16:51 [Intel-gfx] [PATCH 0/8] drm/i915: Move power well code to a separate file Imre Deak
2022-02-22 16:51 ` [Intel-gfx] [PATCH 1/8] drm/i915: Fix the VDSC_PW2 power domain enum value Imre Deak
2022-02-22 16:51 ` [Intel-gfx] [PATCH 2/8] drm/i915: Sanitize open-coded power well enable()/disable() calls Imre Deak
2022-02-22 16:51 ` [Intel-gfx] [PATCH 3/8] drm/i915: Remove redundant state verification during TypeC AUX power well disabling Imre Deak
2022-02-22 16:51 ` [Intel-gfx] [PATCH 4/8] drm/i915: Move i915_power_well_regs struct into i915_power_well_ops Imre Deak
2022-02-22 16:51 ` [Intel-gfx] [PATCH 5/8] drm/i915: Move power well get/put/enable/disable functions to a new file Imre Deak
2022-02-22 16:51 ` [Intel-gfx] [PATCH 6/8] drm/i915: Add function to call a power well's sync_hw() hook Imre Deak
2022-02-22 16:51 ` [Intel-gfx] [PATCH 7/8] drm/i915: Add functions to get a power well's state/name/domains/mask/refcount Imre Deak
2022-02-22 16:51 ` Imre Deak [this message]
2022-02-23 0:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move power well code to a separate file Patchwork
2022-02-23 0:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-23 0:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-02-23 23:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move power well code to a separate file (rev2) Patchwork
2022-02-23 23:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-24 0:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-24 12:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-25 19:22 ` Imre Deak
2022-02-26 6:12 ` Vudum, Lakshminarayana
2022-02-26 3:40 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220222165137.1004194-9-imre.deak@intel.com \
--to=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox