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From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI 3/3] drm/i915: Use i915_gem_object_pin_map_unlocked function for lmem allocation
Date: Tue,  1 Mar 2022 17:08:35 +0000	[thread overview]
Message-ID: <20220301170835.682715-3-matthew.auld@intel.com> (raw)
In-Reply-To: <20220301170835.682715-1-matthew.auld@intel.com>

From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

Using i915_gem_object_pin_map_unlocked instead of
i915_gem_object_lmem_io_map, would eliminate the need
of using I915_BO_ALLOC_CONTIGUOUS, when calling
i915_vma_pin_iomap, because it supports non-contiguous
allocation as well.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 drivers/gpu/drm/i915/i915_vma.c | 27 ++++++++++++++++++++-------
 1 file changed, 20 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 94fcdb7bd21d..c3bfa1312507 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -562,10 +562,16 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
 		 * of pages, that way we can also drop the
 		 * I915_BO_ALLOC_CONTIGUOUS when allocating the object.
 		 */
-		if (i915_gem_object_is_lmem(vma->obj))
-			ptr = i915_gem_object_lmem_io_map(vma->obj, 0,
-							  vma->obj->base.size);
-		else
+		if (i915_gem_object_is_lmem(vma->obj)) {
+			ptr = (void __iomem *)
+			       i915_gem_object_pin_map_unlocked(vma->obj,
+								I915_MAP_WC);
+			if (IS_ERR(ptr)) {
+				err = PTR_ERR(ptr);
+				goto err;
+			}
+			ptr = page_pack_bits(ptr, 1);
+		} else
 			ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
 						vma->node.start,
 						vma->node.size);
@@ -575,7 +581,10 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
 		}
 
 		if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) {
-			io_mapping_unmap(ptr);
+			if (page_unmask_bits(ptr))
+				__i915_gem_object_release_map(vma->obj);
+			else
+				io_mapping_unmap(ptr);
 			ptr = vma->iomap;
 		}
 	}
@@ -589,7 +598,7 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
 	i915_vma_set_ggtt_write(vma);
 
 	/* NB Access through the GTT requires the device to be awake. */
-	return ptr;
+	return page_mask_bits(ptr);
 
 err_unpin:
 	__i915_vma_unpin(vma);
@@ -1748,7 +1757,11 @@ static void __i915_vma_iounmap(struct i915_vma *vma)
 	if (vma->iomap == NULL)
 		return;
 
-	io_mapping_unmap(vma->iomap);
+	if (page_unmask_bits(vma->iomap))
+		__i915_gem_object_release_map(vma->obj);
+	else
+		io_mapping_unmap(vma->iomap);
+
 	vma->iomap = NULL;
 }
 
-- 
2.34.1


  parent reply	other threads:[~2022-03-01 17:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-01 17:08 [Intel-gfx] [CI 1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Matthew Auld
2022-03-01 17:08 ` [Intel-gfx] [CI 2/3] drm/i915/fbdev: fixup setting screen_size Matthew Auld
2022-03-01 17:08 ` Matthew Auld [this message]
2022-03-01 21:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gtt: reduce overzealous alignment constraints for GGTT Patchwork
2022-03-01 22:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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