From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 3/8] drm/i915/stolen: consider I915_BO_ALLOC_GPU_ONLY
Date: Thu, 10 Mar 2022 12:27:46 +0000 [thread overview]
Message-ID: <20220310122751.89693-4-matthew.auld@intel.com> (raw)
In-Reply-To: <20220310122751.89693-1-matthew.auld@intel.com>
Keep the behaviour consistent with normal lmem, where we assume CPU
access if by default required.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 6df1600708a7..369a2a60bd7a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -695,6 +695,14 @@ static int _i915_gem_object_stolen_init(struct intel_memory_region *mem,
if (size == 0)
return -EINVAL;
+ /*
+ * With discrete devices, where we lack a mappable aperture there is no
+ * possible way to ever access this memory on the CPU side.
+ */
+ if (mem->type == INTEL_MEMORY_STOLEN_LOCAL && !mem->io_size &&
+ !(flags & I915_BO_ALLOC_GPU_ONLY))
+ return -ENOSPC;
+
stolen = kzalloc(sizeof(*stolen), GFP_KERNEL);
if (!stolen)
return -ENOMEM;
--
2.34.1
next prev parent reply other threads:[~2022-03-10 12:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-10 12:27 [Intel-gfx] [PATCH v2 0/8] Some more bits for small BAR enabling Matthew Auld
2022-03-10 12:27 ` [Intel-gfx] [PATCH v2 1/8] drm/i915/lmem: don't treat small BAR as an error Matthew Auld
2022-03-10 12:27 ` [Intel-gfx] [PATCH v2 2/8] drm/i915/stolen: " Matthew Auld
2022-03-10 12:27 ` Matthew Auld [this message]
2022-03-10 12:27 ` [Intel-gfx] [PATCH v2 4/8] drm/i915: add i915_gem_object_create_region_at() Matthew Auld
2022-03-10 12:27 ` [Intel-gfx] [PATCH v2 5/8] drm/i915/ttm: wire up the object offset Matthew Auld
2022-03-10 12:27 ` [Intel-gfx] [PATCH v2 6/8] drm/i915/display: Check mappable aperture when pinning preallocated vma Matthew Auld
2022-03-11 11:06 ` Matthew Auld
2022-03-10 12:27 ` [Intel-gfx] [PATCH v2 7/8] drm/i915: fixup the initial fb base on DG1 Matthew Auld
2022-03-10 12:27 ` [Intel-gfx] [PATCH v2 8/8] drm/i915: fixup the initial fb on DG2 Matthew Auld
2022-03-10 12:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Some more bits for small BAR enabling (rev2) Patchwork
2022-03-10 13:30 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-10 17:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Some more bits for small BAR enabling (rev3) Patchwork
2022-03-10 17:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-10 22:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-03-11 10:55 ` [Intel-gfx] [PATCH v2 0/8] Some more bits for small BAR enabling Das, Nirmoy
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