From: Jigar Bhatt <jigar.bhatt@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: nischal.varide@intel.com, jigar.bhatt@intel.com
Subject: [Intel-gfx] [PATCH 0/1] drm/i915/display: Communicate display configuration to pcode
Date: Thu, 14 Apr 2022 11:37:28 +0530 [thread overview]
Message-ID: <20220414060729.1973394-1-jigar.bhatt@intel.com> (raw)
Display to communicate "display configuration" to Pcode for more accurate
power accounting for DG2. Existing sequence is sending only voltage.
New sequence is sending cdclk along with number pipe of active pipes
to Pcode.
Jigar Bhatt (1):
drm/i915/display: Communicate display configuration to pcode
drivers/gpu/drm/i915/display/intel_cdclk.c | 93 +++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_cdclk.h | 2 +
drivers/gpu/drm/i915/display/intel_display.c | 6 ++
drivers/gpu/drm/i915/i915_reg.h | 4 +
4 files changed, 101 insertions(+), 4 deletions(-)
--
2.25.1
next reply other threads:[~2022-04-14 6:07 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-14 6:07 Jigar Bhatt [this message]
2022-04-14 6:07 ` [Intel-gfx] [PATCH RFC 1/1] drm/i915/display: Communicate display configuration to pcode Jigar Bhatt
2022-04-14 6:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-04-14 6:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-14 7:01 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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