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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: stable@vger.kernel.org
Subject: [Intel-gfx] [PATCH] drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses
Date: Thu, 21 Apr 2022 19:22:21 +0300	[thread overview]
Message-ID: <20220421162221.2261895-1-imre.deak@intel.com> (raw)

Fix typo in the _SEL_FETCH_PLANE_BASE_1_B register base address.

Fixes: a5523e2ff074a5 ("drm/i915: Add PSR2 selective fetch registers")
References: https://gitlab.freedesktop.org/drm/intel/-/issues/5400
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: <stable@vger.kernel.org> # v5.9+
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 04d86cb6224fc..0ca6517b4595a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5172,7 +5172,7 @@
 #define _SEL_FETCH_PLANE_BASE_6_A		0x70940
 #define _SEL_FETCH_PLANE_BASE_7_A		0x70960
 #define _SEL_FETCH_PLANE_BASE_CUR_A		0x70880
-#define _SEL_FETCH_PLANE_BASE_1_B		0x70990
+#define _SEL_FETCH_PLANE_BASE_1_B		0x71890
 
 #define _SEL_FETCH_PLANE_BASE_A(plane) _PICK(plane, \
 					     _SEL_FETCH_PLANE_BASE_1_A, \
-- 
2.30.2


             reply	other threads:[~2022-04-21 16:22 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-21 16:22 Imre Deak [this message]
2022-04-21 16:26 ` [Intel-gfx] [PATCH] drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses Souza, Jose
2022-04-21 20:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2022-04-21 21:08 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-04-22  9:38   ` Imre Deak
2022-04-25 15:27     ` Vudum, Lakshminarayana
2022-04-22 12:45 ` Patchwork
2022-04-22 13:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-04-22 14:25 ` Patchwork
2022-04-22 18:48 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-04-25 11:59   ` Imre Deak
2022-04-25 15:22 ` Patchwork

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