From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH v3 03/18] drm/i915/bios: Get access to the tail end of the LFP data block
Date: Tue, 26 Apr 2022 22:32:07 +0300 [thread overview]
Message-ID: <20220426193222.3422-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220426193222.3422-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We need to start parsing stuff from the tail end of the LFP data block.
This is made awkward by the fact that the fp_timing table has variable
size. So we must use a bit more finesse to get the tail end, and to
make sure we allocate enough memory for it to make sure our struct
representation fits.
v2: Rebase due to the preallocation of BDB blocks
v3: Rebase due to min_size WARN relocation
v4: Document BDB_LVDS_LFP_DATA vs. BDB_LVDS_LFP_DATA_PTRS order (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 43 ++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 17 ++++++++
2 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 7bc3d55b6bb0..ecfce9adfbbb 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -186,10 +186,14 @@ static const struct {
.min_size = sizeof(struct bdb_edp), },
{ .section_id = BDB_LVDS_OPTIONS,
.min_size = sizeof(struct bdb_lvds_options), },
+ /*
+ * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
+ * so keep the two ordered.
+ */
{ .section_id = BDB_LVDS_LFP_DATA_PTRS,
.min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
{ .section_id = BDB_LVDS_LFP_DATA,
- .min_size = sizeof(struct bdb_lvds_lfp_data), },
+ .min_size = 0, /* special case */ },
{ .section_id = BDB_LVDS_BACKLIGHT,
.min_size = sizeof(struct bdb_lfp_backlight_data), },
{ .section_id = BDB_LFP_POWER,
@@ -204,6 +208,23 @@ static const struct {
.min_size = sizeof(struct bdb_generic_dtd), },
};
+static size_t lfp_data_min_size(struct drm_i915_private *i915)
+{
+ const struct bdb_lvds_lfp_data_ptrs *ptrs;
+ size_t size;
+
+ ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
+ if (!ptrs)
+ return 0;
+
+ size = sizeof(struct bdb_lvds_lfp_data);
+ if (ptrs->panel_name.table_size)
+ size = max(size, ptrs->panel_name.offset +
+ sizeof(struct bdb_lvds_lfp_data_tail));
+
+ return size;
+}
+
static bool validate_lfp_data_ptrs(const void *bdb,
const struct bdb_lvds_lfp_data_ptrs *ptrs)
{
@@ -491,6 +512,9 @@ static void init_bdb_blocks(struct drm_i915_private *i915,
enum bdb_block_id section_id = bdb_blocks[i].section_id;
size_t min_size = bdb_blocks[i].min_size;
+ if (section_id == BDB_LVDS_LFP_DATA)
+ min_size = lfp_data_min_size(i915);
+
init_bdb_block(i915, bdb, section_id, min_size);
}
}
@@ -561,6 +585,16 @@ get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
return (const void *)data + ptrs->ptr[index].fp_timing.offset;
}
+static const struct bdb_lvds_lfp_data_tail *
+get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
+ const struct bdb_lvds_lfp_data_ptrs *ptrs)
+{
+ if (ptrs->panel_name.table_size)
+ return (const void *)data + ptrs->panel_name.offset;
+ else
+ return NULL;
+}
+
/* Parse general panel options */
static void
parse_panel_options(struct drm_i915_private *i915)
@@ -665,6 +699,7 @@ static void
parse_lfp_data(struct drm_i915_private *i915)
{
const struct bdb_lvds_lfp_data *data;
+ const struct bdb_lvds_lfp_data_tail *tail;
const struct bdb_lvds_lfp_data_ptrs *ptrs;
ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
@@ -677,6 +712,12 @@ parse_lfp_data(struct drm_i915_private *i915)
if (!i915->vbt.lfp_lvds_vbt_mode)
parse_lfp_panel_dtd(i915, data, ptrs);
+
+ tail = get_lfp_data_tail(data, ptrs);
+ if (!tail)
+ return;
+
+ (void)tail;
}
static void
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index e4a11c3e3f3e..64551d206aeb 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -783,6 +783,23 @@ struct lvds_lfp_panel_name {
u8 name[13];
} __packed;
+struct lvds_lfp_black_border {
+ u8 top; /* 227 */
+ u8 bottom; /* 227 */
+ u8 left; /* 238 */
+ u8 right; /* 238 */
+} __packed;
+
+struct bdb_lvds_lfp_data_tail {
+ struct lvds_lfp_panel_name panel_name[16]; /* 156-163? */
+ u16 scaling_enable; /* 187 */
+ u8 seamless_drrs_min_refresh_rate[16]; /* 188 */
+ u8 pixel_overlap_count[16]; /* 208 */
+ struct lvds_lfp_black_border black_border[16]; /* 227 */
+ u16 dual_lfp_port_sync_enable; /* 231 */
+ u16 gpu_dithering_for_banding_artifacts; /* 245 */
+} __packed;
+
/*
* Block 43 - LFP Backlight Control Data Block
*/
--
2.35.1
next prev parent reply other threads:[~2022-04-26 19:32 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-26 19:32 [Intel-gfx] [PATCH v3 00/18] drm/i915/bios: Rework BDB block handling and PNPID->panel_type matching Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 01/18] drm/i915/bios: Reorder panel DTD parsing Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 02/18] drm/i915/bios: Generate LFP data table pointers if the VBT lacks them Ville Syrjala
2022-05-03 10:55 ` Jani Nikula
2022-05-03 17:29 ` Ville Syrjälä
2022-04-26 19:32 ` Ville Syrjala [this message]
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 04/18] drm/i915/bios: Document the mess around the LFP data tables Ville Syrjala
2022-05-03 10:56 ` Jani Nikula
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 05/18] drm/i915/bios: Assume panel_type==0 if the VBT has bogus data Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 06/18] drm/i915/bios: Split parse_driver_features() into two parts Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 07/18] drm/i915/bios: Split VBT parsing to global vs. panel specific parts Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 08/18] drm/i915/bios: Don't parse some panel specific data multiple times Ville Syrjala
2022-05-03 11:08 ` Jani Nikula
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 09/18] drm/i915/pps: Split PPS init+sanitize in two Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 10/18] drm/i915/pps: Reinit PPS delays after VBT has been fully parsed Ville Syrjala
2022-05-03 11:46 ` Jani Nikula
2022-05-03 17:05 ` Ville Syrjälä
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 11/18] drm/i915/bios: Do panel specific VBT parsing later Ville Syrjala
2022-05-03 11:07 ` Jani Nikula
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 12/18] drm/i915/bios: Extract get_panel_type() Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 13/18] drm/i915/bios: Refactor panel_type code Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 14/18] drm/i915/bios: Determine panel type via PNPID match Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 15/18] drm/i915/bios: Parse the seamless DRRS min refresh rate Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 16/18] drm/i915: Respect VBT " Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 17/18] drm/edid: Extract drm_edid_decode_mfg_id() Ville Syrjala
2022-04-26 19:32 ` [Intel-gfx] [PATCH v3 18/18] drm/i915/bios: Dump PNPID and panel name Ville Syrjala
2022-04-26 20:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/bios: Rework BDB block handling and PNPID->panel_type matching (rev7) Patchwork
2022-04-26 20:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-26 20:56 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-04-27 13:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/bios: Rework BDB block handling and PNPID->panel_type matching (rev8) Patchwork
2022-04-27 13:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-27 13:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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