From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 06/12] drm/i915: Drop has_reset_engine from device info
Date: Wed, 4 May 2022 12:07:50 -0700 [thread overview]
Message-ID: <20220504190756.466270-6-jose.souza@intel.com> (raw)
In-Reply-To: <20220504190756.466270-1-jose.souza@intel.com>
No need to have this parameter in intel_device_info struct
as all platforms with graphics version 7 or newer can reset engines.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 5 -----
drivers/gpu/drm/i915/intel_device_info.h | 1 -
3 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 5422a3b84bd44..894f17f8b4cea 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -699,7 +699,7 @@ bool intel_has_reset_engine(const struct intel_gt *gt)
if (gt->i915->params.reset < 2)
return false;
- return INTEL_INFO(gt->i915)->has_reset_engine;
+ return GRAPHICS_VER(gt->i915) >= 7;
}
int intel_reset_guc(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 516f28d4db611..b47f8b1ab9c6c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -454,7 +454,6 @@ static const struct intel_device_info snb_m_gt2_info = {
.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
.has_coherent_ggtt = true, \
.has_llc = 1, \
- .has_reset_engine = true, \
.has_rps = true, \
.dma_mask_size = 40, \
.ppgtt_type = INTEL_PPGTT_ALIASING, \
@@ -512,7 +511,6 @@ static const struct intel_device_info vlv_info = {
.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
.has_runtime_pm = 1,
- .has_reset_engine = true,
.has_rps = true,
.display.has_gmch = 1,
.display.has_hotplug = 1,
@@ -615,7 +613,6 @@ static const struct intel_device_info chv_info = {
.dma_mask_size = 39,
.ppgtt_type = INTEL_PPGTT_FULL,
.ppgtt_size = 32,
- .has_reset_engine = 1,
.has_snoop = true,
.has_coherent_ggtt = false,
.display_mmio_offset = VLV_DISPLAY_BASE,
@@ -696,7 +693,6 @@ static const struct intel_device_info skl_gt4_info = {
.dma_mask_size = 39, \
.ppgtt_type = INTEL_PPGTT_FULL, \
.ppgtt_size = 48, \
- .has_reset_engine = 1, \
.has_snoop = true, \
.has_coherent_ggtt = false, \
HSW_PIPE_OFFSETS, \
@@ -995,7 +991,6 @@ static const struct intel_device_info adl_p_info = {
.has_logical_ring_contexts = 1, \
.has_logical_ring_elsq = 1, \
.has_mslices = 1, \
- .has_reset_engine = 1, \
.has_rps = 1, \
.has_runtime_pm = 1, \
.ppgtt_size = 48, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 599cb265946b8..62c9616ea6a9c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -142,7 +142,6 @@ enum intel_ppgtt_type {
func(has_64k_pages); \
func(needs_compact_pt); \
func(gpu_reset_clobbers_display); \
- func(has_reset_engine); \
func(has_4tile); \
func(has_flat_ccs); \
func(has_global_mocs); \
--
2.36.0
next prev parent reply other threads:[~2022-05-04 19:07 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-04 19:07 [Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer José Roberto de Souza
2022-05-04 19:07 ` [Intel-gfx] [PATCH 02/12] drm/i915/display: Disable DSB for DG2 and Alderlake-P José Roberto de Souza
2022-05-04 19:07 ` [Intel-gfx] [PATCH 03/12] drm/i915: Drop has_gt_uc from device info José Roberto de Souza
2022-05-04 20:40 ` Matt Roper
2022-05-04 19:07 ` [Intel-gfx] [PATCH 04/12] drm/i915: Drop has_rc6 " José Roberto de Souza
2022-05-04 20:42 ` Matt Roper
2022-05-04 19:07 ` [Intel-gfx] [PATCH 05/12] drm/i915: Drop has_rc6p " José Roberto de Souza
2022-05-04 20:45 ` Matt Roper
2022-05-04 21:27 ` Ville Syrjälä
2022-05-04 19:07 ` José Roberto de Souza [this message]
2022-05-04 20:47 ` [Intel-gfx] [PATCH 06/12] drm/i915: Drop has_reset_engine " Matt Roper
2022-05-04 19:07 ` [Intel-gfx] [PATCH 07/12] drm/i915: Drop has_logical_ring_elsq " José Roberto de Souza
2022-05-04 20:50 ` Matt Roper
2022-05-04 19:07 ` [Intel-gfx] [PATCH 08/12] drm/i915: Drop has_ddi " José Roberto de Souza
2022-05-04 20:56 ` Matt Roper
2022-05-04 19:07 ` [Intel-gfx] [PATCH 09/12] drm/i915: Drop has_dp_mst " José Roberto de Souza
2022-05-04 21:01 ` Matt Roper
2022-05-04 19:07 ` [Intel-gfx] [PATCH 10/12] drm/i915: Drop has_psr " José Roberto de Souza
2022-05-04 21:03 ` Matt Roper
2022-05-04 19:07 ` [Intel-gfx] [PATCH 11/12] drm/i915: Drop has_psr_hw_tracking " José Roberto de Souza
2022-05-04 21:08 ` Matt Roper
2022-05-04 19:07 ` [Intel-gfx] [PATCH 12/12] drm/i915: Drop supports_tv " José Roberto de Souza
2022-05-04 20:39 ` [Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer Matt Roper
2022-05-04 21:33 ` Ville Syrjälä
2022-05-05 15:57 ` Souza, Jose
2022-05-04 22:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] " Patchwork
2022-05-04 22:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-04 23:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-05-05 4:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-05-05 10:45 ` [Intel-gfx] [PATCH 01/12] " Jani Nikula
2022-05-05 14:00 ` Souza, Jose
2022-05-05 14:49 ` Ville Syrjälä
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