From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH CI 3/7] drm/i915: Drop has_reset_engine from device info
Date: Thu, 5 May 2022 12:35:20 -0700 [thread overview]
Message-ID: <20220505193524.276400-3-jose.souza@intel.com> (raw)
In-Reply-To: <20220505193524.276400-1-jose.souza@intel.com>
No need to have this parameter in intel_device_info struct
as all platforms with graphics version 7 or newer can reset engines.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 5 -----
drivers/gpu/drm/i915/intel_device_info.h | 1 -
3 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 5422a3b84bd44..894f17f8b4cea 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -699,7 +699,7 @@ bool intel_has_reset_engine(const struct intel_gt *gt)
if (gt->i915->params.reset < 2)
return false;
- return INTEL_INFO(gt->i915)->has_reset_engine;
+ return GRAPHICS_VER(gt->i915) >= 7;
}
int intel_reset_guc(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e21d08375b25d..6f8bc9008fe02 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -456,7 +456,6 @@ static const struct intel_device_info snb_m_gt2_info = {
.has_coherent_ggtt = true, \
.has_llc = 1, \
.has_rc6p = 1, \
- .has_reset_engine = true, \
.has_rps = true, \
.dma_mask_size = 40, \
.ppgtt_type = INTEL_PPGTT_ALIASING, \
@@ -514,7 +513,6 @@ static const struct intel_device_info vlv_info = {
.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
.has_runtime_pm = 1,
- .has_reset_engine = true,
.has_rps = true,
.display.has_gmch = 1,
.display.has_hotplug = 1,
@@ -618,7 +616,6 @@ static const struct intel_device_info chv_info = {
.dma_mask_size = 39,
.ppgtt_type = INTEL_PPGTT_FULL,
.ppgtt_size = 32,
- .has_reset_engine = 1,
.has_snoop = true,
.has_coherent_ggtt = false,
.display_mmio_offset = VLV_DISPLAY_BASE,
@@ -700,7 +697,6 @@ static const struct intel_device_info skl_gt4_info = {
.dma_mask_size = 39, \
.ppgtt_type = INTEL_PPGTT_FULL, \
.ppgtt_size = 48, \
- .has_reset_engine = 1, \
.has_snoop = true, \
.has_coherent_ggtt = false, \
.display.has_ipc = 1, \
@@ -1003,7 +999,6 @@ static const struct intel_device_info adl_p_info = {
.has_logical_ring_contexts = 1, \
.has_logical_ring_elsq = 1, \
.has_mslices = 1, \
- .has_reset_engine = 1, \
.has_rps = 1, \
.has_runtime_pm = 1, \
.ppgtt_size = 48, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index ab283d88461e0..52460093c76e6 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -142,7 +142,6 @@ enum intel_ppgtt_type {
func(has_64k_pages); \
func(needs_compact_pt); \
func(gpu_reset_clobbers_display); \
- func(has_reset_engine); \
func(has_4tile); \
func(has_flat_ccs); \
func(has_global_mocs); \
--
2.36.0
next prev parent reply other threads:[~2022-05-05 19:34 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-05 19:35 [Intel-gfx] [PATCH CI 1/7] drm/i915: Drop has_gt_uc from device info José Roberto de Souza
2022-05-05 19:35 ` [Intel-gfx] [PATCH CI 2/7] drm/i915: Drop has_rc6 " José Roberto de Souza
2022-05-05 19:35 ` José Roberto de Souza [this message]
2022-05-05 19:35 ` [Intel-gfx] [PATCH CI 4/7] drm/i915: Drop has_logical_ring_elsq " José Roberto de Souza
2022-05-05 19:35 ` [Intel-gfx] [PATCH CI 5/7] drm/i915: Drop has_ddi " José Roberto de Souza
2022-05-09 13:32 ` Tvrtko Ursulin
2022-05-09 14:01 ` Souza, Jose
2022-05-09 14:27 ` Tvrtko Ursulin
2022-05-09 14:52 ` Souza, Jose
2022-05-09 14:05 ` Jani Nikula
2022-05-09 14:23 ` Souza, Jose
2022-05-10 7:48 ` Jani Nikula
2022-05-05 19:35 ` [Intel-gfx] [PATCH CI 6/7] drm/i915: Drop has_dp_mst " José Roberto de Souza
2022-05-05 19:35 ` [Intel-gfx] [PATCH CI 7/7] drm/i915: Drop has_psr " José Roberto de Souza
2022-05-05 20:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/7] drm/i915: Drop has_gt_uc " Patchwork
2022-05-05 20:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-05 21:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-05-06 0:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-05-19 10:35 ` [Intel-gfx] [PATCH CI 1/7] " Tvrtko Ursulin
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