From: Robert Beckett <bob.beckett@collabora.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
kernel@collabora.com, "Matthew Auld" <matthew.auld@intel.com>,
linux-kernel@vger.kernel.org
Subject: [Intel-gfx] [PATCH v10 08/11] drm/i915/ttm: add buffer pin on alloc flag
Date: Thu, 7 Jul 2022 20:02:26 +0000 [thread overview]
Message-ID: <20220707200230.1657555-9-bob.beckett@collabora.com> (raw)
In-Reply-To: <20220707200230.1657555-1-bob.beckett@collabora.com>
For situations where allocations need to fail on alloc instead of
delayed get_pages, add a new alloc flag to pin the ttm bo.
This makes sure that the resource has been allocated during buffer
creation, allowing it to fail with an error if the placement is
exhausted.
This allows existing fallback options for stolen backend allocation like
create_ring_vma to work as expected.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
---
.../gpu/drm/i915/gem/i915_gem_object_types.h | 13 ++++++----
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 25 ++++++++++++++++++-
2 files changed, 32 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 6632ed52e919..07bc11247a3e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -325,17 +325,20 @@ struct drm_i915_gem_object {
* dealing with userspace objects the CPU fault handler is free to ignore this.
*/
#define I915_BO_ALLOC_GPU_ONLY BIT(6)
+/* object should be pinned in destination region from allocation */
+#define I915_BO_ALLOC_PINNED BIT(7)
#define I915_BO_ALLOC_FLAGS (I915_BO_ALLOC_CONTIGUOUS | \
I915_BO_ALLOC_VOLATILE | \
I915_BO_ALLOC_CPU_CLEAR | \
I915_BO_ALLOC_USER | \
I915_BO_ALLOC_PM_VOLATILE | \
I915_BO_ALLOC_PM_EARLY | \
- I915_BO_ALLOC_GPU_ONLY)
-#define I915_BO_READONLY BIT(7)
-#define I915_TILING_QUIRK_BIT 8 /* unknown swizzling; do not release! */
-#define I915_BO_PROTECTED BIT(9)
-#define I915_BO_WAS_BOUND_BIT 10
+ I915_BO_ALLOC_GPU_ONLY | \
+ I915_BO_ALLOC_PINNED)
+#define I915_BO_READONLY BIT(8)
+#define I915_TILING_QUIRK_BIT 9 /* unknown swizzling; do not release! */
+#define I915_BO_PROTECTED BIT(10)
+#define I915_BO_WAS_BOUND_BIT 11
/**
* @mem_flags - Mutable placement-related flags
*
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 27d59639177f..bb988608296d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -998,6 +998,13 @@ static void i915_ttm_delayed_free(struct drm_i915_gem_object *obj)
{
GEM_BUG_ON(!obj->ttm.created);
+ /* stolen objects are pinned for lifetime. Unpin before putting */
+ if (obj->flags & I915_BO_ALLOC_PINNED) {
+ ttm_bo_reserve(i915_gem_to_ttm(obj), true, false, NULL);
+ ttm_bo_unpin(i915_gem_to_ttm(obj));
+ ttm_bo_unreserve(i915_gem_to_ttm(obj));
+ }
+
ttm_bo_put(i915_gem_to_ttm(obj));
}
@@ -1193,6 +1200,9 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
.no_wait_gpu = false,
};
enum ttm_bo_type bo_type;
+ struct ttm_place _place;
+ struct ttm_placement _placement;
+ struct ttm_placement *placement;
int ret;
drm_gem_private_object_init(&i915->drm, &obj->base, size);
@@ -1222,6 +1232,17 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
*/
i915_gem_object_make_unshrinkable(obj);
+ if (obj->flags & I915_BO_ALLOC_PINNED) {
+ i915_ttm_place_from_region(mem, &_place, obj->bo_offset,
+ obj->base.size, obj->flags);
+ _placement.num_placement = 1;
+ _placement.placement = &_place;
+ _placement.num_busy_placement = 0;
+ _placement.busy_placement = NULL;
+ placement = &_placement;
+ } else {
+ placement = &i915_sys_placement;
+ }
/*
* If this function fails, it will call the destructor, but
* our caller still owns the object. So no freeing in the
@@ -1230,7 +1251,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
* until successful initialization.
*/
ret = ttm_bo_init_reserved(&i915->bdev, i915_gem_to_ttm(obj), size,
- bo_type, &i915_sys_placement,
+ bo_type, placement,
page_size >> PAGE_SHIFT,
&ctx, NULL, NULL, i915_ttm_bo_destroy);
if (ret)
@@ -1242,6 +1263,8 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
i915_ttm_adjust_domains_after_move(obj);
i915_ttm_adjust_gem_after_move(obj);
obj->ttm.cache_level_override = false;
+ if (obj->flags & I915_BO_ALLOC_PINNED)
+ ttm_bo_pin(i915_gem_to_ttm(obj));
i915_gem_object_unlock(obj);
return 0;
--
2.25.1
next prev parent reply other threads:[~2022-07-07 20:03 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-07 20:02 [Intel-gfx] [PATCH v10 00/11] drm/i915: ttm for stolen Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 01/11] drm/i915/ttm: dont trample cache_level overrides during ttm move Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 02/11] drm/i915: limit ttm to dma32 for i965G[M] Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 03/11] drm/i915/ttm: only trust snooping for dgfx when deciding default cache_level Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 04/11] drm/i915/gem: selftest should not attempt mmap of private regions Robert Beckett
2022-07-08 7:53 ` Matthew Auld
2022-07-08 13:22 ` Robert Beckett
2022-07-08 13:27 ` Matthew Auld
2022-07-08 13:31 ` Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 05/11] drm/i915: instantiate ttm ranger manager for stolen memory Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 06/11] drm/i915: sanitize mem_flags for stolen buffers Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 07/11] drm/i915: ttm move/clear logic fix Robert Beckett
2022-07-07 20:02 ` Robert Beckett [this message]
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 09/11] drm/i915/selftest: don't attempt engine reset of guc submission engines Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 10/11] drm/i915/selftest: wait for requests during engine reset selftest Robert Beckett
2022-07-07 20:02 ` [Intel-gfx] [PATCH v10 11/11] drm/i915: stolen memory use ttm backend Robert Beckett
2022-07-07 21:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: ttm for stolen (rev8) Patchwork
2022-07-07 21:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-07-08 15:38 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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