From: Mauro Carvalho Chehab <mauro.chehab@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Mauro Carvalho Chehab <mchehab@kernel.org>
Subject: Re: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Fix TLB invalidate issues with Broadwell (rev4)
Date: Mon, 11 Jul 2022 08:16:52 +0200 [thread overview]
Message-ID: <20220711081652.50320e1a@maurocar-mobl2> (raw)
In-Reply-To: <Ysg/Vm0fFP7FRTGO@intel.com>
On Fri, 8 Jul 2022 10:29:42 -0400
Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Thu, Jul 07, 2022 at 02:47:57PM -0000, Patchwork wrote:
> > == Series Details ==
> >
> > Series: Fix TLB invalidate issues with Broadwell (rev4)
> > URL : https://patchwork.freedesktop.org/series/105167/
> > State : warning
> >
> > == Summary ==
> >
> > Error: dim sparse failed
> > Sparse version: v0.6.2
> > Fast mode used, each commit won't be checked separately.
> > -
> > +drivers/gpu/drm/i915/gt/intel_reset.c:1410:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
>
> I believe this is a false positive, but worth double checking...
It is. Sparse usually complains when it sees patterns like:
foo_lock()
{
some_lock();
}
foo_unlock()
{
some_unlock();
}
as this is not easy for it to check. It even complains when there are multiple
unlocks at the same function. From my experiences, the only pattern that would
shut up such kind of warning is something like:
some_function()
{
some_lock();
...
if(err)
goto unlock;
...
unlock:
some_unlock();
}
with just one lock and just one unlock call, both at the same function.
-
Besides that, in this specific case, intel_gt_reset_trylock() internally
calls:
*srcu = srcu_read_lock(>->reset.backoff_srcu);
and intel_gt_reset_unlock() is an alias for:
srcu_read_unlock(>->reset.backoff_srcu, tag);
Now, I've no idea why this warning was shown by the bot, as none of the
patches touch nor add new calls to intel_gt_reset_* functions.
It sounds to me that the bot is just printing an already-existing false
positive.
Regards,
Mauro
next prev parent reply other threads:[~2022-07-11 6:16 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-04 8:09 [Intel-gfx] [PATCH v3 0/2] Fix TLB invalidate issues with Broadwell Mauro Carvalho Chehab
2022-07-04 8:09 ` [Intel-gfx] [PATCH v3 1/2] drm/i915/gt: Serialize GRDOM access between multiple engine resets Mauro Carvalho Chehab
2022-07-04 15:20 ` Mauro Carvalho Chehab
2022-07-06 10:51 ` Andi Shyti
2022-07-07 21:27 ` Andrzej Hajda
2022-07-04 8:09 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/gt: Serialize TLB invalidates with GT resets Mauro Carvalho Chehab
2022-07-04 15:20 ` Mauro Carvalho Chehab
2022-07-06 10:50 ` Andi Shyti
2022-07-07 21:28 ` Andrzej Hajda
2022-07-04 15:20 ` [Intel-gfx] [PATCH v3 0/2] Fix TLB invalidate issues with Broadwell Mauro Carvalho Chehab
2022-07-04 19:35 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix TLB invalidate issues with Broadwell (rev3) Patchwork
2022-07-04 19:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-07-04 19:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-07-05 0:53 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-07-07 14:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fix TLB invalidate issues with Broadwell (rev4) Patchwork
2022-07-08 14:27 ` Rodrigo Vivi
2022-07-07 14:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-07-08 14:29 ` Rodrigo Vivi
2022-07-11 6:16 ` Mauro Carvalho Chehab [this message]
2022-07-07 15:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-07-08 6:00 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-07-08 14:31 ` Rodrigo Vivi
2022-07-11 6:31 ` Mauro Carvalho Chehab
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