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From: John.C.Harrison@Intel.com
To: Intel-GFX@Lists.FreeDesktop.Org
Cc: "Michał Winiarski" <michal.winiarski@intel.com>,
	DRI-Devel@Lists.FreeDesktop.Org
Subject: [Intel-gfx] [PATCH 07/12] drm/i915/guc: Route semaphores to GuC for Gen12+
Date: Tue, 12 Jul 2022 16:31:31 -0700	[thread overview]
Message-ID: <20220712233136.1044951-8-John.C.Harrison@Intel.com> (raw)
In-Reply-To: <20220712233136.1044951-1-John.C.Harrison@Intel.com>

From: Michał Winiarski <michal.winiarski@intel.com>

Since we're going to use semaphores in selftests (and eventually in
regular GuC submission), let's route semaphores to GuC.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h        |  4 ++++
 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 14 ++++++++++++++
 2 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
index 8dc063f087eb1..a7092f711e9cd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
@@ -102,6 +102,10 @@
 #define   GUC_SEND_TRIGGER		  (1<<0)
 #define GEN11_GUC_HOST_INTERRUPT	_MMIO(0x1901f0)
 
+#define GEN12_GUC_SEM_INTR_ENABLES	_MMIO(0xc71c)
+#define   GUC_SEM_INTR_ROUTE_TO_GUC	BIT(31)
+#define   GUC_SEM_INTR_ENABLE_ALL	(0xff)
+
 #define GUC_NUM_DOORBELLS		256
 
 /* format of the HW-monitored doorbell cacheline */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 40f726c61e951..7537459080278 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -3953,13 +3953,27 @@ int intel_guc_submission_setup(struct intel_engine_cs *engine)
 
 void intel_guc_submission_enable(struct intel_guc *guc)
 {
+	struct intel_gt *gt = guc_to_gt(guc);
+
+	/* Enable and route to GuC */
+	if (GRAPHICS_VER(gt->i915) >= 12)
+		intel_uncore_write(gt->uncore, GEN12_GUC_SEM_INTR_ENABLES,
+				   GUC_SEM_INTR_ROUTE_TO_GUC |
+				   GUC_SEM_INTR_ENABLE_ALL);
+
 	guc_init_lrc_mapping(guc);
 	guc_init_engine_stats(guc);
 }
 
 void intel_guc_submission_disable(struct intel_guc *guc)
 {
+	struct intel_gt *gt = guc_to_gt(guc);
+
 	/* Note: By the time we're here, GuC may have already been reset */
+
+	/* Disable and route to host */
+	if (GRAPHICS_VER(gt->i915) >= 12)
+		intel_uncore_write(gt->uncore, GEN12_GUC_SEM_INTR_ENABLES, 0x0);
 }
 
 static bool __guc_submission_supported(struct intel_guc *guc)
-- 
2.36.0


  parent reply	other threads:[~2022-07-12 23:32 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-12 23:31 [Intel-gfx] [PATCH 00/12] Random assortment of (mostly) GuC related patches John.C.Harrison
2022-07-12 23:31 ` [Intel-gfx] [PATCH 01/12] drm/i915: Remove bogus GEM_BUG_ON in unpark John.C.Harrison
2022-07-18 12:15   ` Tvrtko Ursulin
2022-07-19  0:05     ` John Harrison
2022-07-19  9:42       ` Tvrtko Ursulin
2022-07-21  0:54         ` John Harrison
2022-07-21  9:24           ` Tvrtko Ursulin
2022-07-22 19:09             ` John Harrison
2022-07-12 23:31 ` [Intel-gfx] [PATCH 02/12] drm/i915/guc: Don't call ring_is_idle in GuC submission John.C.Harrison
2022-07-18 12:26   ` Tvrtko Ursulin
2022-07-19  0:09     ` John Harrison
2022-07-19  9:49       ` Tvrtko Ursulin
2022-07-19 10:14         ` Tvrtko Ursulin
2022-07-12 23:31 ` [Intel-gfx] [PATCH 03/12] drm/i915/guc: Fix issues with live_preempt_cancel John.C.Harrison
2022-07-12 23:31 ` [Intel-gfx] [PATCH 04/12] drm/i915/guc: Add GuC <-> kernel time stamp translation information John.C.Harrison
2022-07-12 23:31 ` [Intel-gfx] [PATCH 05/12] drm/i915/guc: Record CTB info in error logs John.C.Harrison
2022-07-12 23:31 ` [Intel-gfx] [PATCH 06/12] drm/i915/guc: Use streaming loads to speed up dumping the guc log John.C.Harrison
2022-07-22 20:05   ` John Harrison
2022-07-12 23:31 ` John.C.Harrison [this message]
2022-07-13  0:51   ` [Intel-gfx] [PATCH 07/12] drm/i915/guc: Route semaphores to GuC for Gen12+ Matthew Brost
2022-07-15 17:21   ` Ceraolo Spurio, Daniele
2022-07-12 23:31 ` [Intel-gfx] [PATCH 08/12] drm/i915/guc: Add selftest for a hung GuC John.C.Harrison
2022-07-12 23:31 ` [Intel-gfx] [PATCH 09/12] drm/i915/selftest: Cope with not having an RCS engine John.C.Harrison
2022-07-13  0:48   ` Matthew Brost
2022-07-12 23:31 ` [Intel-gfx] [PATCH 10/12] drm/i915/guc: Support larger contexts on newer hardware John.C.Harrison
2022-07-18 12:35   ` Tvrtko Ursulin
2022-07-19  0:13     ` John Harrison
2022-07-19  9:56       ` Tvrtko Ursulin
2022-07-22 19:32         ` John Harrison
2022-07-25 11:24           ` Tvrtko Ursulin
2022-07-12 23:31 ` [Intel-gfx] [PATCH 11/12] drm/i915/guc: Don't abort on CTB_UNUSED status John.C.Harrison
2022-07-18 12:36   ` Tvrtko Ursulin
2022-07-19  0:16     ` John Harrison
2022-07-12 23:31 ` [Intel-gfx] [PATCH 12/12] drm/i915/guc: Add a helper for log buffer size John.C.Harrison
2022-07-13  0:46   ` Matthew Brost
2022-07-13  0:31 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for Random assortment of (mostly) GuC related patches Patchwork
2022-07-13 20:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Random assortment of (mostly) GuC related patches (rev2) Patchwork
2022-07-13 20:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-07-14  1:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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