From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 04/23] drm/i915/mtl: Don't mask off CCS according to DSS fusing
Date: Wed, 27 Jul 2022 18:34:01 -0700 [thread overview]
Message-ID: <20220728013420.3750388-5-radhakrishna.sripada@intel.com> (raw)
In-Reply-To: <20220728013420.3750388-1-radhakrishna.sripada@intel.com>
From: Matt Roper <matthew.d.roper@intel.com>
Unlike the Xe_HP platforms, MTL only has a single CCS engine; the
quad-based engine masking logic does not apply to this platform (or
presumably any future platforms that only have 0 or 1 CCS).
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 37fa813af766..17e7f20bbb48 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -672,7 +672,7 @@ static void engine_mask_apply_compute_fuses(struct intel_gt *gt)
unsigned long ccs_mask;
unsigned int i;
- if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50))
+ if (hweight32(CCS_MASK(gt)) <= 1)
return;
ccs_mask = intel_slicemask_from_xehp_dssmask(info->sseu.compute_subslice_mask,
--
2.25.1
next prev parent reply other threads:[~2022-07-28 1:34 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-28 1:33 [Intel-gfx] [PATCH 00/23] Initial Meteorlake Support Radhakrishna Sripada
2022-07-28 1:33 ` [Intel-gfx] [PATCH 01/23] drm/i915: Read graphics/media/display arch version from hw Radhakrishna Sripada
2022-07-28 3:46 ` [Intel-gfx] [v1.1 " Radhakrishna Sripada
2022-08-10 11:02 ` Jani Nikula
2022-08-10 13:23 ` Jani Nikula
2022-08-18 14:58 ` Balasubramani Vivekanandan
2022-07-28 1:33 ` [Intel-gfx] [PATCH 02/23] drm/i915: Parse and set stepping for platforms with GMD Radhakrishna Sripada
2022-07-28 1:34 ` [Intel-gfx] [PATCH 03/23] drm/i915/mtl: MMIO range is now 4MB Radhakrishna Sripada
2022-07-28 1:34 ` Radhakrishna Sripada [this message]
2022-07-28 1:34 ` [Intel-gfx] [PATCH 05/23] drm/i915/mtl: Define engine context layouts Radhakrishna Sripada
2022-07-28 1:34 ` [Intel-gfx] [PATCH 06/23] drm/i915/mtl: Add PCH support Radhakrishna Sripada
2022-07-28 21:28 ` Srivatsa, Anusha
2022-07-28 1:34 ` [Intel-gfx] [PATCH 07/23] drm/i915/mtl: Add gmbus and gpio support Radhakrishna Sripada
2022-08-01 21:33 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 08/23] drm/i915/mtl: Add VBT port and AUX_CH mapping Radhakrishna Sripada
2022-08-01 21:45 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 09/23] drm/i915/mtl: Add support for MTL in Display Init sequences Radhakrishna Sripada
2022-08-01 21:49 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 10/23] drm/i915/mtl: Add display power wells Radhakrishna Sripada
2022-08-02 1:23 ` Matt Roper
2022-08-02 15:40 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 11/23] drm/i915/mtl: Add DP AUX support on TypeC ports Radhakrishna Sripada
2022-08-02 15:41 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 12/23] drm/i915/mtl: Fix rawclk for Meteorlake PCH Radhakrishna Sripada
2022-08-02 3:28 ` Matt Roper
2022-08-02 3:36 ` Caz Yokoyama
2022-07-28 1:34 ` [Intel-gfx] [PATCH 13/23] drm/i915/mtl: memory latency data from LATENCY_LPX_LPY for WM Radhakrishna Sripada
2022-08-02 16:12 ` Matt Roper
2022-08-10 11:09 ` Jani Nikula
2022-08-10 11:10 ` Jani Nikula
2022-07-28 1:34 ` [Intel-gfx] [PATCH 14/23] drm/i915/mtl: Add CDCLK Support Radhakrishna Sripada
2022-07-28 1:34 ` [Intel-gfx] [PATCH 15/23] drm/i915/mtl: Obtain SAGV values from MMIO instead of GT pcode mailbox Radhakrishna Sripada
2022-08-02 16:43 ` Matt Roper
2022-08-02 16:53 ` Caz Yokoyama
2022-08-10 11:14 ` Jani Nikula
2022-07-28 1:34 ` [Intel-gfx] [PATCH 16/23] drm/i915/mtl: Update memory bandwidth parameters Radhakrishna Sripada
2022-08-02 16:52 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 17/23] drm/i915/mtl: Update MBUS_DBOX credits Radhakrishna Sripada
2022-08-02 17:14 ` Matt Roper
2022-08-03 13:55 ` Balasubramani Vivekanandan
2022-07-28 1:34 ` [Intel-gfx] [PATCH 18/23] drm/i915/mtl: DBUF handling is same as adlp Radhakrishna Sripada
2022-08-02 17:35 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 19/23] drm/i915/display/mtl: Extend MBUS programming Radhakrishna Sripada
2022-08-02 17:39 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 20/23] drm/i915/dmc: Load DMC on MTL Radhakrishna Sripada
2022-08-02 18:00 ` Matt Roper
2022-07-28 1:34 ` [Intel-gfx] [PATCH 21/23] drm/i915/dmc: MTL DMC debugfs entries Radhakrishna Sripada
2022-08-02 18:22 ` Matt Roper
2022-08-09 18:06 ` Srivatsa, Anusha
2022-07-28 1:34 ` [Intel-gfx] [PATCH 22/23] drm/i915/mtl: Update CHICKEN_TRANS* register addresses Radhakrishna Sripada
2022-08-10 11:21 ` Jani Nikula
2022-07-28 1:34 ` [Intel-gfx] [PATCH 23/23] drm/i915/mtl: Do not update GV point, mask value Radhakrishna Sripada
2022-07-28 1:54 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Initial Meteorlake Support Patchwork
2022-08-02 3:26 ` [Intel-gfx] [PATCH 00/23] " Matt Roper
2022-08-04 9:08 ` Jani Nikula
2022-08-04 13:10 ` Jani Nikula
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