From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org,
Lionel G Landwerlin <lionel.g.landwerlin@intel.com>,
Ashutosh Dixit <ashutosh.dixit@intel.com>
Subject: [Intel-gfx] [PATCH 14/19] drm/i915/perf: Add Wa_1608133521:dg2
Date: Tue, 23 Aug 2022 00:03:37 +0000 [thread overview]
Message-ID: <20220823000342.281222-15-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20220823000342.281222-1-umesh.nerlige.ramappa@intel.com>
DG2 introduces 64 bit counters and OA reports that have 64 bit values
for fields in the report header - report_id, timestamp, context_id and
gpu ticks. i915 uses report_id, timestamp and context_id to check for
valid reports.
In some DG2 variants, only the lower dwords for timestamp, report_id and
context_id are accessible. Add workaround for such reports.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/i915/i915_perf.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 3a1e0c5271e2..494c67e29d6c 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -310,7 +310,7 @@ static u32 i915_oa_max_sample_rate = 100000;
* be used as a mask to align the OA tail pointer. In some of the
* formats, R is used to denote reserved field.
*/
-static const struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
+static struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
[I915_OA_FORMAT_A13] = { 0, 64 },
[I915_OA_FORMAT_A29] = { 1, 128 },
[I915_OA_FORMAT_A13_B8_C8] = { 2, 128 },
@@ -4755,6 +4755,13 @@ static void oa_init_supported_formats(struct i915_perf *perf)
/* Wa_16010703925:dg2 */
clear_bit(I915_OAR_FORMAT_A36u64_B8_C8, perf->format_mask);
}
+
+ if (IS_DG2_GRAPHICS_STEP(i915, G10, STEP_A0, STEP_B0) ||
+ IS_DG2_GRAPHICS_STEP(i915, G11, STEP_A0, STEP_FOREVER)) {
+ /* Wa_1608133521:dg2 */
+ oa_formats[I915_OAR_FORMAT_A36u64_B8_C8].header = HDR_32_BIT;
+ oa_formats[I915_OA_FORMAT_A38u64_R2u64_B8_C8].header = HDR_32_BIT;
+ }
}
static void i915_perf_init_info(struct drm_i915_private *i915)
--
2.25.1
next prev parent reply other threads:[~2022-08-23 0:06 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-23 0:03 [Intel-gfx] [PATCH 00/19] Add DG2 OA support Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 01/19] drm/i915/perf: Fix OA filtering logic for GuC mode Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats for DG2 Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 03/19] drm/i915/perf: Fix noa wait predication " Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 04/19] drm/i915/perf: Determine gen12 oa ctx offset at runtime Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 05/19] drm/i915/perf: Enable commands per clock reporting in OA Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 06/19] drm/i915/perf: Use helpers to process reports w.r.t. OA buffer size Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 07/19] drm/i915/perf: Simply use stream->ctx Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 08/19] drm/i915/perf: Move gt-specific data from i915->perf to gt->perf Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 09/19] drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 10/19] drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 11/19] drm/i915/perf: Store a pointer to oa_format in oa_buffer Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 12/19] drm/i915/perf: Parse 64bit report header formats correctly Umesh Nerlige Ramappa
2022-08-23 7:51 ` Jani Nikula
2022-08-23 0:03 ` [Intel-gfx] [PATCH 13/19] drm/i915/perf: Add Wa_16010703925:dg2 Umesh Nerlige Ramappa
2022-08-23 0:03 ` Umesh Nerlige Ramappa [this message]
2022-08-23 0:03 ` [Intel-gfx] [PATCH 15/19] drm/i915/perf: Add Wa_1508761755:dg2 Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 16/19] drm/i915/perf: Apply Wa_18013179988 Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 17/19] drm/i915/perf: Save/restore EU flex counters across reset Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 18/19] drm/i915/guc: Support OA when Wa_16011777198 is enabled Umesh Nerlige Ramappa
2022-08-23 0:03 ` [Intel-gfx] [PATCH 19/19] drm/i915/perf: Enable OA for DG2 Umesh Nerlige Ramappa
-- strict thread matches above, loose matches on Subject: below --
2022-08-23 20:41 [Intel-gfx] [PATCH 00/19] Add DG2 OA support Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 14/19] drm/i915/perf: Add Wa_1608133521:dg2 Umesh Nerlige Ramappa
2022-08-29 14:04 ` Jani Nikula
2022-09-16 1:21 ` Dixit, Ashutosh
2022-09-16 18:19 ` Umesh Nerlige Ramappa
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