From: Ashutosh Dixit <ashutosh.dixit@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: stable@vger.kernel.org, dri-devel@lists.freedesktop.org,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915/gt: Fix perf limit reasons bit positions
Date: Thu, 8 Sep 2022 08:58:21 -0700 [thread overview]
Message-ID: <20220908155821.1662110-1-ashutosh.dixit@intel.com> (raw)
Perf limit reasons bit positions were off by one.
Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces")
Cc: stable@vger.kernel.org # v5.18+
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Acked-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c413eec3373f..24009786f88b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1794,14 +1794,14 @@
#define GT0_PERF_LIMIT_REASONS _MMIO(0x1381a8)
#define GT0_PERF_LIMIT_REASONS_MASK 0xde3
-#define PROCHOT_MASK REG_BIT(1)
-#define THERMAL_LIMIT_MASK REG_BIT(2)
-#define RATL_MASK REG_BIT(6)
-#define VR_THERMALERT_MASK REG_BIT(7)
-#define VR_TDC_MASK REG_BIT(8)
-#define POWER_LIMIT_4_MASK REG_BIT(9)
-#define POWER_LIMIT_1_MASK REG_BIT(11)
-#define POWER_LIMIT_2_MASK REG_BIT(12)
+#define PROCHOT_MASK REG_BIT(0)
+#define THERMAL_LIMIT_MASK REG_BIT(1)
+#define RATL_MASK REG_BIT(5)
+#define VR_THERMALERT_MASK REG_BIT(6)
+#define VR_TDC_MASK REG_BIT(7)
+#define POWER_LIMIT_4_MASK REG_BIT(8)
+#define POWER_LIMIT_1_MASK REG_BIT(10)
+#define POWER_LIMIT_2_MASK REG_BIT(11)
#define CHV_CLK_CTL1 _MMIO(0x101100)
#define VLV_CLK_CTL2 _MMIO(0x101104)
--
2.34.1
next reply other threads:[~2022-09-08 15:58 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-08 15:58 Ashutosh Dixit [this message]
2022-09-08 16:00 ` [Intel-gfx] [PATCH] drm/i915/gt: Fix perf limit reasons bit positions Dixit, Ashutosh
2022-09-08 16:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Fix perf limit reasons bit positions (rev2) Patchwork
2022-09-08 16:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-08 20:52 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-09-09 20:14 ` Matt Roper
2022-09-09 21:56 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-09-07 22:09 [Intel-gfx] [PATCH] drm/i915/gt: Fix perf limit reasons bit positions Ashutosh Dixit
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