[Intel-gfx] [RFC 0/1] DGFX pin_map with rpm

[Anshuman Gupta <anshuman.gupta@intel.com>]

As per PCIe Spec Section 5.3.1.4.1
When a PCIe function is in d3hot state, 
Configuration and Message requests are the only TLPs accepted by a 
Function in the D3hot state. All other received Requests must be 
handled as Unsupported Requests, and all received Completions
may optionally be handled as Unexpected Completions.

Therefore all PCIe iomem transaction requires to keep the PCIe endpoint
function in D0 state.

This RFC proposal is depends on the assumption with my understanding of code,
we can't partially pin_map the lmem gem object, with considering 
that every caller of i915_gem_onject_pin_map() does not need to grab 
the wakeref. We can embedded the wakeref inside the gem object itself.

Requesting community to provide the feedback on this proposal.

Anshuman Gupta (1):
  drm/i915/dgfx: Handling of pin_map against rpm

 drivers/gpu/drm/i915/gem/i915_gem_object.c       |  2 ++
 drivers/gpu/drm/i915/gem/i915_gem_object.h       |  5 +++++
 drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 14 ++++++++++++++
 drivers/gpu/drm/i915/gem/i915_gem_pages.c        |  8 ++++++++
 4 files changed, 29 insertions(+)

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2.26.2