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From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Nirmoy Das <nirmoy.das@intel.com>, Jianshui Yu <jianshui.yu@intel.com>
Subject: [Intel-gfx] [PATCH v3 3/4] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
Date: Fri, 30 Sep 2022 17:12:02 +0100	[thread overview]
Message-ID: <20220930161203.432540-3-matthew.auld@intel.com> (raw)
In-Reply-To: <20220930161203.432540-1-matthew.auld@intel.com>

For these types of display buffers, we need to able to CPU access some
part of the backing memory in prepare_plane_clear_colors(). As a result
we need to ensure we always place in the mappable part of lmem, which
becomes necessary on small-bar systems.

v2(Nirmoy & Ville):
 - Add some commentary for why we need to CPU access the buffer.
 - Split out the other changes, so we just consider the display change
   here.

Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
Reported-by: Jianshui Yu <jianshui.yu@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb_pin.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 0cd9e8cb078b..0c444a3d8d8e 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -139,8 +139,20 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
 	ret = i915_gem_object_lock(obj, &ww);
 	if (!ret && phys_cursor)
 		ret = i915_gem_object_attach_phys(obj, alignment);
-	else if (!ret && HAS_LMEM(dev_priv))
-		ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
+	else if (!ret && HAS_LMEM(dev_priv)) {
+		unsigned int flags = obj->flags;
+
+		/*
+		 * For this type of buffer we need to able to read from the CPU
+		 * the clear color value found in the buffer, hence we need to
+		 * ensure it is always in the mappable part of lmem, if this is
+		 * a small-bar device.
+		 */
+		if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
+			flags &= ~I915_BO_ALLOC_GPU_ONLY;
+		ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
+						flags);
+	}
 	if (!ret)
 		ret = i915_gem_object_pin_pages(obj);
 	if (ret)
-- 
2.37.3


  parent reply	other threads:[~2022-09-30 16:13 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-30 16:12 [Intel-gfx] [PATCH v3 1/4] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
2022-09-30 16:12 ` [Intel-gfx] [PATCH v3 2/4] drm/i915: allow control over the flags when migrating Matthew Auld
2022-09-30 16:12 ` Matthew Auld [this message]
2022-09-30 16:12 ` [Intel-gfx] [PATCH v3 4/4] drm/i915: check memory is mappable in read_from_page Matthew Auld
2022-09-30 17:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/4] drm/i915: remove the TODO in pin_and_fence_fb_obj Patchwork
2022-09-30 18:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-01 15:14 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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