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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] i915: Extend Wa_1607297627 to Alderlake-P
Date: Thu, 13 Oct 2022 11:14:26 -0700	[thread overview]
Message-ID: <20221013181426.306746-1-jose.souza@intel.com> (raw)

BSpec: 54369
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index b8eb20a155f0d..e1d5df3a5756e 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2300,11 +2300,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 	}
 
 	if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) ||
-	    IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
+	    IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) {
 		/*
 		 * Wa_1607030317:tgl
 		 * Wa_1607186500:tgl
-		 * Wa_1607297627:tgl,rkl,dg1[a0]
+		 * Wa_1607297627:tgl,rkl,dg1[a0],adlp
 		 *
 		 * On TGL and RKL there are multiple entries for this WA in the
 		 * BSpec; some indicate this is an A0-only WA, others indicate
-- 
2.38.0


             reply	other threads:[~2022-10-13 18:14 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-13 18:14 José Roberto de Souza [this message]
2022-10-13 18:23 ` [Intel-gfx] [PATCH] i915: Extend Wa_1607297627 to Alderlake-P Souza, Jose
2022-10-14 22:08   ` Lucas De Marchi
2022-10-17  8:51     ` Tvrtko Ursulin
2022-10-17 12:47       ` Souza, Jose
2022-10-13 20:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2022-10-13 21:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for i915: Extend Wa_1607297627 to Alderlake-P (rev2) Patchwork
2022-10-14  0:05 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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