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From: Andrzej Hajda <andrzej.hajda@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>,
	Matthew Auld <matthew.auld@intel.com>,
	Andrzej Hajda <andrzej.hajda@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915/selftests: add prefetch padding to store_dw batchbuffer
Date: Wed, 19 Oct 2022 09:12:52 +0200	[thread overview]
Message-ID: <20221019071252.180682-1-andrzej.hajda@intel.com> (raw)

Instruction prefetch mechanism requires that 512 bytes after the last
command should be readable by EU. Otherwise DMAR errors and engine
hangs can happen.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5278
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
---
 drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
index 3c55e77b0f1b00..fe999a02f8e10a 100644
--- a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
+++ b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
@@ -50,7 +50,7 @@ igt_emit_store_dw(struct i915_vma *vma,
 	u32 *cmd;
 	int err;
 
-	size = (4 * count + 1) * sizeof(u32);
+	size = (4 * count + 1) * sizeof(u32) + 512;
 	size = round_up(size, PAGE_SIZE);
 	obj = i915_gem_object_create_internal(vma->vm->i915, size);
 	if (IS_ERR(obj))
-- 
2.34.1


             reply	other threads:[~2022-10-19  7:13 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-19  7:12 Andrzej Hajda [this message]
2022-10-19  8:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: add prefetch padding to store_dw batchbuffer Patchwork
2022-10-19  9:12 ` [Intel-gfx] [PATCH] " Matthew Auld
2022-10-19  9:14   ` Matthew Auld
2022-10-19 11:01     ` Andrzej Hajda
2022-10-19 14:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork

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