From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 5/9] drm/i915/display: Add helper function to check if sink_format is 420
Date: Fri, 28 Oct 2022 15:14:07 +0530 [thread overview]
Message-ID: <20221028094411.3673476-6-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20221028094411.3673476-1-ankit.k.nautiyal@intel.com>
Add an inline helper function to check if the sink_format is set to
YCBCR420 format.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +++---
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ae070420309d..33da22a9174c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -2093,4 +2093,10 @@ to_intel_frontbuffer(struct drm_framebuffer *fb)
return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL;
}
+static inline bool
+intel_crtc_has_420_sink_format(const struct intel_crtc_state *crtc_state)
+{
+ return crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420;
+}
+
#endif /* __INTEL_DISPLAY_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f40584130232..b9ef59882a90 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2008,7 +2008,7 @@ intel_dp_compute_output_format(struct intel_encoder *encoder,
ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
respect_downstream_limits);
if (ret) {
- if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
+ if (intel_crtc_has_420_sink_format(crtc_state) ||
!drm_mode_is_420_also(info, adjusted_mode))
return ret;
@@ -2688,7 +2688,7 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
drm_dbg_kms(&i915->drm, "Failed to %s protocol converter HDMI mode\n",
str_enable_disable(intel_dp->has_hdmi_sink));
- if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+ if (intel_crtc_has_420_sink_format(crtc_state)) {
switch (crtc_state->output_format) {
case INTEL_OUTPUT_FORMAT_YCBCR420:
/*
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index cb7dd8ebb33f..c0e602ccb021 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2068,7 +2068,7 @@ static bool hdmi_bpc_possible(const struct intel_crtc_state *crtc_state, int bpc
return false;
/* Display Wa_1405510057:icl,ehl */
- if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
+ if (intel_crtc_has_420_sink_format(crtc_state) &&
bpc == 10 && DISPLAY_VER(dev_priv) == 11 &&
(adjusted_mode->crtc_hblank_end -
adjusted_mode->crtc_hblank_start) % 8 == 2)
@@ -2228,7 +2228,7 @@ static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
crtc_state->sink_format);
ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
if (ret) {
- if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
+ if (intel_crtc_has_420_sink_format(crtc_state) ||
!drm_mode_is_420_also(info, adjusted_mode))
return ret;
@@ -2285,7 +2285,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
return ret;
}
- if (pipe_config->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+ if (intel_crtc_has_420_sink_format(pipe_config)) {
ret = intel_panel_fitting(pipe_config, conn_state);
if (ret)
return ret;
--
2.25.1
next prev parent reply other threads:[~2022-10-28 9:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-28 9:44 [Intel-gfx] [PATCH v5 0/9] Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes Ankit Nautiyal
2022-10-28 9:44 ` [Intel-gfx] [PATCH v5 1/9] drm/i915/display: Add new member to configure PCON color conversion Ankit Nautiyal
2022-11-10 20:38 ` Ville Syrjälä
2022-11-15 7:48 ` Nautiyal, Ankit K
2022-10-28 9:44 ` [Intel-gfx] [PATCH v5 2/9] drm/i915/display: Add new member in intel_dp to store ycbcr420 passthrough cap Ankit Nautiyal
2022-10-28 9:44 ` [Intel-gfx] [PATCH v5 3/9] drm/i915/dp: Replace intel_dp.dfp members with the new crtc_state sink_format Ankit Nautiyal
2022-11-10 21:06 ` Ville Syrjälä
2022-11-15 6:53 ` Nautiyal, Ankit K
2022-11-15 11:00 ` Ville Syrjälä
2022-11-15 16:42 ` Nautiyal, Ankit K
2022-10-28 9:44 ` [Intel-gfx] [PATCH v5 4/9] drm/i915/display: Use sink_format instead of ycbcr420_output flag Ankit Nautiyal
2022-10-28 9:44 ` Ankit Nautiyal [this message]
2022-10-28 9:44 ` [Intel-gfx] [PATCH v5 6/9] drm/i915/dp: Avoid DSC with output_format YCBC420 Ankit Nautiyal
2022-10-28 9:44 ` [Intel-gfx] [PATCH v5 7/9] drm/i915/dp: Handle BPP where HDMI2.1 DFP doesn't support DSC Ankit Nautiyal
2022-10-28 9:44 ` [Intel-gfx] [PATCH v5 8/9] drm/i915/dp: Fix FRL BW check for HDMI2.1 DFP Ankit Nautiyal
2022-10-28 9:44 ` [Intel-gfx] [PATCH v5 9/9] drm/i915/dp: Add a wrapper to check frl/tmds downstream constraints Ankit Nautiyal
2022-10-28 11:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes (rev5) Patchwork
2022-10-28 11:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-28 19:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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