From: Sean Christopherson <seanjc@google.com>
To: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Zhenyu Wang <zhenyuw@linux.intel.com>,
Zhi Wang <zhi.a.wang@intel.com>
Cc: Yan Zhao <yan.y.zhao@intel.com>,
kvm@vger.kernel.org, intel-gfx@lists.freedesktop.org,
linux-kernel@vger.kernel.org, Ben Gardon <bgardon@google.com>,
intel-gvt-dev@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 03/27] drm/i915/gvt: Incorporate KVM memslot info into check for 2MiB GTT entry
Date: Fri, 23 Dec 2022 00:57:15 +0000 [thread overview]
Message-ID: <20221223005739.1295925-4-seanjc@google.com> (raw)
In-Reply-To: <20221223005739.1295925-1-seanjc@google.com>
Honor KVM's max allowed page size when determining whether or not a 2MiB
GTT shadow page can be created for the guest. Querying KVM's max allowed
size is somewhat odd as there's no strict requirement that KVM's memslots
and VFIO's mappings are configured with the same gfn=>hva mapping, but
the check will be accurate if userspace wants to have a functional guest,
and at the very least checking KVM's memslots guarantees that the entire
2MiB range has been exposed to the guest.
Note, KVM may also restrict the mapping size for reasons that aren't
relevant to KVMGT, e.g. for KVM's iTLB multi-hit workaround or if the gfn
is write-tracked (KVM's write-tracking only handles writes from vCPUs).
However, such scenarios are unlikely to occur with a well-behaved guest,
and at worst will result in sub-optimal performance.
Fixes: b901b252b6cf ("drm/i915/gvt: Add 2M huge gtt support")
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
arch/x86/include/asm/kvm_page_track.h | 2 ++
arch/x86/kvm/mmu/page_track.c | 18 ++++++++++++++++++
drivers/gpu/drm/i915/gvt/gtt.c | 10 +++++++++-
3 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/kvm_page_track.h b/arch/x86/include/asm/kvm_page_track.h
index eb186bc57f6a..3f72c7a172fc 100644
--- a/arch/x86/include/asm/kvm_page_track.h
+++ b/arch/x86/include/asm/kvm_page_track.h
@@ -51,6 +51,8 @@ void kvm_page_track_cleanup(struct kvm *kvm);
bool kvm_page_track_write_tracking_enabled(struct kvm *kvm);
int kvm_page_track_write_tracking_alloc(struct kvm_memory_slot *slot);
+enum pg_level kvm_page_track_max_mapping_level(struct kvm *kvm, gfn_t gfn,
+ enum pg_level max_level);
void kvm_page_track_free_memslot(struct kvm_memory_slot *slot);
int kvm_page_track_create_memslot(struct kvm *kvm,
diff --git a/arch/x86/kvm/mmu/page_track.c b/arch/x86/kvm/mmu/page_track.c
index 2e09d1b6249f..69ea16c31859 100644
--- a/arch/x86/kvm/mmu/page_track.c
+++ b/arch/x86/kvm/mmu/page_track.c
@@ -300,3 +300,21 @@ void kvm_page_track_flush_slot(struct kvm *kvm, struct kvm_memory_slot *slot)
n->track_flush_slot(kvm, slot, n);
srcu_read_unlock(&head->track_srcu, idx);
}
+
+enum pg_level kvm_page_track_max_mapping_level(struct kvm *kvm, gfn_t gfn,
+ enum pg_level max_level)
+{
+ struct kvm_memory_slot *slot;
+ int idx;
+
+ idx = srcu_read_lock(&kvm->srcu);
+ slot = gfn_to_memslot(kvm, gfn);
+ if (!slot || slot->flags & KVM_MEMSLOT_INVALID)
+ max_level = PG_LEVEL_4K;
+ else
+ max_level = kvm_mmu_max_slot_mapping_level(slot, gfn, max_level);
+ srcu_read_unlock(&kvm->srcu, idx);
+
+ return max_level;
+}
+EXPORT_SYMBOL_GPL(kvm_page_track_max_mapping_level);
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index d0fca53a3563..6736d7bd94ea 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -1178,14 +1178,22 @@ static int is_2MB_gtt_possible(struct intel_vgpu *vgpu,
struct intel_gvt_gtt_entry *entry)
{
const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
+ unsigned long gfn = ops->get_pfn(entry);
kvm_pfn_t pfn;
+ int max_level;
if (!HAS_PAGE_SIZES(vgpu->gvt->gt->i915, I915_GTT_PAGE_SIZE_2M))
return 0;
if (!vgpu->attached)
return -EINVAL;
- pfn = gfn_to_pfn(vgpu->vfio_device.kvm, ops->get_pfn(entry));
+
+ max_level = kvm_page_track_max_mapping_level(vgpu->vfio_device.kvm,
+ gfn, PG_LEVEL_2M);
+ if (max_level < PG_LEVEL_2M)
+ return 0;
+
+ pfn = gfn_to_pfn(vgpu->vfio_device.kvm, gfn);
if (is_error_noslot_pfn(pfn))
return -EINVAL;
--
2.39.0.314.g84b9a713c41-goog
next prev parent reply other threads:[~2022-12-23 0:58 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-23 0:57 [Intel-gfx] [PATCH 00/27] drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 01/27] drm/i915/gvt: Verify pfn is "valid" before dereferencing "struct page" Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 02/27] KVM: x86/mmu: Factor out helper to get max mapping size of a memslot Sean Christopherson
2022-12-23 0:57 ` Sean Christopherson [this message]
2022-12-28 5:42 ` [Intel-gfx] [PATCH 03/27] drm/i915/gvt: Incorporate KVM memslot info into check for 2MiB GTT entry Yan Zhao
2023-01-03 21:13 ` Sean Christopherson
2023-01-05 3:07 ` Yan Zhao
2023-01-05 17:40 ` Sean Christopherson
2023-01-06 5:56 ` Yan Zhao
2023-01-06 23:01 ` Sean Christopherson
2023-01-09 9:58 ` Yan Zhao
2023-01-11 17:55 ` Sean Christopherson
2023-01-19 2:58 ` Zhenyu Wang
2023-01-19 5:26 ` Yan Zhao
2023-02-23 20:41 ` Sean Christopherson
2023-02-24 5:09 ` Yan Zhao
2023-01-12 8:31 ` Yan Zhao
2022-12-23 0:57 ` [Intel-gfx] [PATCH 04/27] drm/i915/gvt: Verify VFIO-pinned page is THP when shadowing 2M gtt entry Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 05/27] drm/i915/gvt: Put the page reference obtained by KVM's gfn_to_pfn() Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 06/27] drm/i915/gvt: Don't rely on KVM's gfn_to_pfn() to query possible 2M GTT Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 07/27] drm/i915/gvt: Use an "unsigned long" to iterate over memslot gfns Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 08/27] drm/i915/gvt: Hoist acquisition of vgpu_lock out to kvmgt_page_track_write() Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 09/27] drm/i915/gvt: Protect gfn hash table with dedicated mutex Sean Christopherson
2022-12-28 5:03 ` Yan Zhao
2023-01-03 20:43 ` Sean Christopherson
2023-01-05 0:51 ` Yan Zhao
2022-12-23 0:57 ` [Intel-gfx] [PATCH 10/27] KVM: x86/mmu: Don't rely on page-track mechanism to flush on memslot change Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 11/27] KVM: x86/mmu: Don't bounce through page-track mechanism for guest PTEs Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 12/27] KVM: drm/i915/gvt: Drop @vcpu from KVM's ->track_write() hook Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 13/27] KVM: x86: Reject memslot MOVE operations if KVMGT is attached Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 14/27] drm/i915/gvt: Don't bother removing write-protection on to-be-deleted slot Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 15/27] KVM: x86: Add a new page-track hook to handle memslot deletion Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 16/27] drm/i915/gvt: switch from ->track_flush_slot() to ->track_remove_region() Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 17/27] KVM: x86: Remove the unused page-track hook track_flush_slot() Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 18/27] KVM: x86/mmu: Move KVM-only page-track declarations to internal header Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 19/27] KVM: x86/mmu: Use page-track notifiers iff there are external users Sean Christopherson
2022-12-28 6:56 ` Yan Zhao
2023-01-04 0:50 ` Sean Christopherson
2023-08-07 12:01 ` Like Xu
2023-08-07 17:19 ` Sean Christopherson
2023-08-09 1:02 ` Yan Zhao
2023-08-09 14:33 ` Sean Christopherson
2023-08-09 23:21 ` Yan Zhao
2023-08-10 3:02 ` Yan Zhao
2023-08-10 15:41 ` Sean Christopherson
2023-08-11 5:57 ` Yan Zhao
2022-12-23 0:57 ` [Intel-gfx] [PATCH 20/27] KVM: x86/mmu: Drop infrastructure for multiple page-track modes Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 21/27] KVM: x86/mmu: Rename page-track APIs to reflect the new reality Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 22/27] KVM: x86/mmu: Assert that correct locks are held for page write-tracking Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 23/27] KVM: x86/mmu: Bug the VM if write-tracking is used but not enabled Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 24/27] KVM: x86/mmu: Drop @slot param from exported/external page-track APIs Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 25/27] KVM: x86/mmu: Handle KVM bookkeeping in page-track APIs, not callers Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 26/27] KVM: x86/mmu: Add page-track API to query if a gfn is valid Sean Christopherson
2022-12-28 7:57 ` Yan Zhao
2023-01-03 21:19 ` Sean Christopherson
2023-01-05 3:12 ` Yan Zhao
2023-01-05 17:53 ` Sean Christopherson
2022-12-23 0:57 ` [Intel-gfx] [PATCH 27/27] drm/i915/gvt: Drop final dependencies on KVM internal details Sean Christopherson
2022-12-23 1:28 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups Patchwork
2022-12-23 9:05 ` [Intel-gfx] [PATCH 00/27] " Yan Zhao
2023-01-04 1:01 ` Sean Christopherson
2023-01-05 3:13 ` Yan Zhao
2022-12-28 5:28 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups (rev2) Patchwork
2023-01-06 6:25 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups (rev3) Patchwork
2023-01-19 9:01 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gvt: KVM: KVMGT fixes and page-track cleanups (rev4) Patchwork
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