From: Mika Kahola <mika.kahola@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [Intel-gfx] [PATCH v2 02/21] drm/i915/mtl: Add DP rates
Date: Thu, 5 Jan 2023 14:54:27 +0200 [thread overview]
Message-ID: <20230105125446.960504-3-mika.kahola@intel.com> (raw)
In-Reply-To: <20230105125446.960504-1-mika.kahola@intel.com>
Add DP rates for Meteorlake.
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221014124740.774835-3-mika.kahola@intel.com
---
drivers/gpu/drm/i915/display/intel_dp.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index bf80f296a8fd..0b08e9b6ea22 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -420,6 +420,11 @@ static int ehl_max_source_rate(struct intel_dp *intel_dp)
return 810000;
}
+static int mtl_max_source_rate(struct intel_dp *intel_dp)
+{
+ return intel_dp_is_edp(intel_dp) ? 675000 : 810000;
+}
+
static int vbt_max_link_rate(struct intel_dp *intel_dp)
{
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
@@ -444,6 +449,10 @@ static void
intel_dp_set_source_rates(struct intel_dp *intel_dp)
{
/* The values must be in increasing order */
+ static const int mtl_rates[] = {
+ 162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
+ 810000,
+ };
static const int icl_rates[] = {
162000, 216000, 270000, 324000, 432000, 540000, 648000, 810000,
1000000, 1350000,
@@ -469,7 +478,11 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
drm_WARN_ON(&dev_priv->drm,
intel_dp->source_rates || intel_dp->num_source_rates);
- if (DISPLAY_VER(dev_priv) >= 11) {
+ if (DISPLAY_VER(dev_priv) >= 14) {
+ source_rates = mtl_rates;
+ size = ARRAY_SIZE(mtl_rates);
+ max_rate = mtl_max_source_rate(intel_dp);
+ } else if (DISPLAY_VER(dev_priv) >= 11) {
source_rates = icl_rates;
size = ARRAY_SIZE(icl_rates);
if (IS_DG2(dev_priv))
--
2.34.1
next prev parent reply other threads:[~2023-01-05 12:59 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-05 12:54 [Intel-gfx] [PATCH v2 00/21] drm/i915/mtl: Add C10 and C20 phy support Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 01/21] drm/i915/mtl: Initial DDI port setup Mika Kahola
2023-01-05 12:54 ` Mika Kahola [this message]
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 03/21] drm/i915/mtl: Create separate reg file for PICA registers Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 04/21] drm/i915/mtl: Add Support for C10 PHY message bus and pll programming Mika Kahola
2023-01-05 14:18 ` Jani Nikula
2023-01-09 9:49 ` Jani Nikula
2023-01-09 10:31 ` Kahola, Mika
2023-02-07 16:49 ` Gustavo Sousa
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 05/21] drm/i915/mtl: Add C10 phy programming for HDMI Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 06/21] drm/i915/mtl: Add vswing programming for C10 phys Mika Kahola
2023-02-07 16:52 ` Gustavo Sousa
2023-02-07 17:35 ` Gustavo Sousa
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 07/21] drm/i915/mtl: Add support for PM DEMAND Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 08/21] drm/i915/mtl: C20 PLL programming Mika Kahola
2023-02-07 16:53 ` Gustavo Sousa
2023-02-21 13:18 ` Kahola, Mika
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 09/21] drm/i915/mtl: C20 HW readout Mika Kahola
2023-02-07 16:54 ` Gustavo Sousa
2023-02-23 9:47 ` Kahola, Mika
2023-02-23 10:36 ` Kahola, Mika
2023-03-24 20:51 ` Gustavo Sousa
2023-03-27 9:07 ` Imre Deak
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 10/21] drm/i915/mtl: C20 port clock calculation Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 11/21] drm/i915/mtl: C20 HDMI state calculations Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 12/21] drm/i915/mtl: Add voltage swing sequence for C20 Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 13/21] drm/i915/mtl: For DP2.0 10G and 20G rates use MPLLA Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 14/21] drm/i915/mtl: Enabling/disabling sequence Thunderbolt pll Mika Kahola
2023-02-07 16:55 ` Gustavo Sousa
2023-02-21 13:23 ` Kahola, Mika
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 15/21] drm/i915/mtl: Readout Thunderbolt HW state Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 16/21] drm/i915/mtl: Enable TC ports Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 17/21] drm/i915/mtl: MTL PICA hotplug detection Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 18/21] drm/i915/mtl: Define mask for DDI AUX interrupts Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 19/21] drm/i915/mtl: Power up TCSS Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 20/21] drm/i915/mtl: TypeC HPD live status query Mika Kahola
2023-01-05 12:54 ` [Intel-gfx] [PATCH v2 21/21] drm/i915/mtl: Pin assignment for TypeC Mika Kahola
2023-01-26 14:40 ` Luca Coelho
2023-01-26 14:43 ` Luca Coelho
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