From: Alan Previn <alan.previn.teres.alexis@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org,
Alan Previn <alan.previn.teres.alexis@intel.com>
Subject: [Intel-gfx] [PATCH 7/9] drm/i915/pxp: MTL-KCR interrupt ctrl's are in GT-0
Date: Tue, 10 Jan 2023 16:56:38 -0800 [thread overview]
Message-ID: <20230111005642.300761-9-alan.previn.teres.alexis@intel.com> (raw)
In-Reply-To: <20230111005642.300761-1-alan.previn.teres.alexis@intel.com>
Despite KCR subsystem being in the media-tile (close to the
GSC-CS), the IRQ controls for it are on GT-0 with other global
IRQ controls. Thus, add a helper for KCR hw interrupt
enable/disable functions to get the correct gt structure (for
uncore) for MTL.
In the helper, we get GT-0's handle for uncore when touching
IRQ registers despite the pxp->ctrl_gt being the media-tile.
No difference for legacy of course.
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 2 +-
drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 23 +++++++++++++++++---
drivers/gpu/drm/i915/pxp/intel_pxp_irq.h | 8 +++++++
3 files changed, 29 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
index 4b8e70caa3ad..9f6e300486b4 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
@@ -44,7 +44,7 @@ static int pxp_terminate_get(void *data, u64 *val)
static int pxp_terminate_set(void *data, u64 val)
{
struct intel_pxp *pxp = data;
- struct intel_gt *gt = pxp->ctrl_gt;
+ struct intel_gt *gt = intel_pxp_get_irq_gt(pxp);
if (!intel_pxp_is_active(pxp))
return -ENODEV;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
index 91e9622c07d0..2eef0c19e91a 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
@@ -8,6 +8,7 @@
#include "gt/intel_gt_regs.h"
#include "gt/intel_gt_types.h"
+#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
@@ -17,6 +18,22 @@
#include "intel_pxp_types.h"
#include "intel_runtime_pm.h"
+/**
+ * intel_pxp_get_irq_gt - Find the correct GT that owns KCR interrupts
+ * @pxp: pointer to pxp struct
+ *
+ * For platforms with a single GT, we return the pxp->ctrl_gt (as expected)
+ * but for MTL+ that has a media-tile, although the KCR engine is in the
+ * media-tile (i.e. pxp->ctrl_gt), the IRQ controls are on the root tile.
+ */
+struct intel_gt *intel_pxp_get_irq_gt(struct intel_pxp *pxp)
+{
+ if (pxp->uses_gsccs)
+ return to_gt(pxp->ctrl_gt->i915);
+
+ return pxp->ctrl_gt;
+}
+
/**
* intel_pxp_irq_handler - Handles PXP interrupts.
* @pxp: pointer to pxp struct
@@ -29,7 +46,7 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp)))
return;
- gt = pxp->ctrl_gt;
+ gt = intel_pxp_get_irq_gt(pxp);
lockdep_assert_held(gt->irq_lock);
@@ -68,7 +85,7 @@ static inline void pxp_irq_reset(struct intel_gt *gt)
void intel_pxp_irq_enable(struct intel_pxp *pxp)
{
- struct intel_gt *gt = pxp->ctrl_gt;
+ struct intel_gt *gt = intel_pxp_get_irq_gt(pxp);
spin_lock_irq(gt->irq_lock);
@@ -83,7 +100,7 @@ void intel_pxp_irq_enable(struct intel_pxp *pxp)
void intel_pxp_irq_disable(struct intel_pxp *pxp)
{
- struct intel_gt *gt = pxp->ctrl_gt;
+ struct intel_gt *gt = intel_pxp_get_irq_gt(pxp);
/*
* We always need to submit a global termination when we re-enable the
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.h b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
index 8c292dc86f68..117159e19e94 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
@@ -9,6 +9,7 @@
#include <linux/types.h>
struct intel_pxp;
+struct intel_gt;
#define GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT BIT(1)
#define GEN12_DISPLAY_APP_TERMINATED_PER_FW_REQ_INTERRUPT BIT(2)
@@ -23,6 +24,8 @@ struct intel_pxp;
void intel_pxp_irq_enable(struct intel_pxp *pxp);
void intel_pxp_irq_disable(struct intel_pxp *pxp);
void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir);
+struct intel_gt *intel_pxp_get_irq_gt(struct intel_pxp *pxp);
+
#else
static inline void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
{
@@ -35,6 +38,11 @@ static inline void intel_pxp_irq_enable(struct intel_pxp *pxp)
static inline void intel_pxp_irq_disable(struct intel_pxp *pxp)
{
}
+
+struct intel_gt *gt intel_pxp_get_irq_gt(struct intel_pxp *pxp)
+{
+ return NULL;
+}
#endif
#endif /* __INTEL_PXP_IRQ_H__ */
--
2.39.0
next prev parent reply other threads:[~2023-01-11 0:57 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 0:56 [Intel-gfx] [PATCH 0/9] drm/i915/pxp: Add MTL PXP Support Alan Previn
2023-01-11 0:56 ` [Intel-gfx] [PATCH 1/9] drm/i915/pxp: Add MTL PXP GSC-CS back-end skeleton Alan Previn
2023-01-11 0:56 ` [Intel-gfx] [PATCH 2/9] drm/i915/pxp: Add GSC-CS back-end resource init and cleanup Alan Previn
2023-01-11 0:56 ` [Intel-gfx] [PATCH 3/9] drm/i915/pxp: Add MTL hw-plumbing enabling for KCR operation Alan Previn
2023-01-11 0:56 ` [Intel-gfx] [PATCH 4/9] drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC Alan Previn
2023-01-11 5:43 ` kernel test robot
2023-01-11 0:56 ` [Intel-gfx] [PATCH 5/9] drm/i915/pxp: Add GSC-CS backend-teelink for send-message function Alan Previn
2023-01-11 7:44 ` kernel test robot
2023-01-11 0:56 ` [Intel-gfx] [PATCH 5/9] drm/i915/pxp: Add GSC-CS backend to send GSC fw messages Alan Previn
2023-01-11 0:56 ` [Intel-gfx] [PATCH 6/9] drm/i915/pxp: Add ARB session creation with new PXP API Ver4.3 Alan Previn
2023-01-11 0:56 ` Alan Previn [this message]
2023-01-11 0:56 ` [Intel-gfx] [PATCH 7/9] drm/i915/pxp: MTL-KCR is in media-tile but IRQ-ctrl's in root Alan Previn
2023-01-11 4:02 ` kernel test robot
2023-01-11 0:56 ` [Intel-gfx] [PATCH 8/9] drm/i915/pxp: On MTL, KCR enabling doesn't wait on tee component Alan Previn
2023-01-11 0:56 ` [Intel-gfx] [PATCH 8/9] drm/i915/pxp: On MTL, KCR HW can be enabled instantly Alan Previn
2023-01-11 0:56 ` [Intel-gfx] [PATCH 9/9] drm/i915/pxp: Enable PXP with MTL-GSC-CS Alan Previn
2023-01-11 1:32 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/pxp: Add MTL PXP Support Patchwork
2023-01-11 18:20 ` Teres Alexis, Alan Previn
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