From: Ashutosh Dixit <ashutosh.dixit@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/3] drm/i915/rps: Expose get_requested_frequency_fw for PMU
Date: Tue, 7 Mar 2023 21:33:20 -0800 [thread overview]
Message-ID: <20230308053321.939906-3-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20230308053321.939906-1-ashutosh.dixit@intel.com>
Expose intel_rps_get_requested_frequency_fw to read the requested freq
without taking forcewake. This is done for use by PMU which does not take
forcewake when reading freq. The code is refactored to use a common set of
functions across sysfs and PMU. It also allows PMU to support both host
turbo (rps) and slpc which was previously missed due to the non-use of
common functions across sysfs and PMU.
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/i915/gt/intel_rps.c | 22 +++++++++++++++++++---
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +-
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 0a8e24bcb874..49df31927c0e 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -2154,7 +2154,7 @@ u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps)
return freq;
}
-u32 intel_rps_read_punit_req(struct intel_rps *rps)
+static u32 intel_rps_read_punit_req(struct intel_rps *rps, bool take_fw)
{
struct intel_uncore *uncore = rps_to_uncore(rps);
struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm;
@@ -2162,7 +2162,8 @@ u32 intel_rps_read_punit_req(struct intel_rps *rps)
u32 freq = 0;
with_intel_runtime_pm_if_in_use(rpm, wakeref)
- freq = intel_uncore_read(uncore, GEN6_RPNSWREQ);
+ freq = take_fw ? intel_uncore_read(uncore, GEN6_RPNSWREQ) :
+ intel_uncore_read_fw(uncore, GEN6_RPNSWREQ);
return freq;
}
@@ -2176,7 +2177,7 @@ static u32 intel_rps_get_req(u32 pureq)
u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps)
{
- u32 freq = intel_rps_get_req(intel_rps_read_punit_req(rps));
+ u32 freq = intel_rps_get_req(intel_rps_read_punit_req(rps, true));
return intel_gpu_freq(rps, freq);
}
@@ -2189,6 +2190,21 @@ u32 intel_rps_get_requested_frequency(struct intel_rps *rps)
return intel_gpu_freq(rps, rps->cur_freq);
}
+static u32 intel_rps_read_punit_req_frequency_fw(struct intel_rps *rps)
+{
+ u32 freq = intel_rps_get_req(intel_rps_read_punit_req(rps, false));
+
+ return intel_gpu_freq(rps, freq);
+}
+
+u32 intel_rps_get_requested_frequency_fw(struct intel_rps *rps)
+{
+ if (rps_uses_slpc(rps))
+ return intel_rps_read_punit_req_frequency_fw(rps);
+ else
+ return intel_gpu_freq(rps, rps->cur_freq);
+}
+
u32 intel_rps_get_max_frequency(struct intel_rps *rps)
{
struct intel_guc_slpc *slpc = rps_to_slpc(rps);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h
index 63511b826a97..a990f985ab23 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps.h
@@ -41,6 +41,7 @@ u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1);
u32 intel_rps_read_actual_frequency(struct intel_rps *rps);
u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps);
u32 intel_rps_get_requested_frequency(struct intel_rps *rps);
+u32 intel_rps_get_requested_frequency_fw(struct intel_rps *rps);
u32 intel_rps_get_min_frequency(struct intel_rps *rps);
u32 intel_rps_get_min_raw_freq(struct intel_rps *rps);
int intel_rps_set_min_frequency(struct intel_rps *rps, u32 val);
@@ -50,7 +51,6 @@ int intel_rps_set_max_frequency(struct intel_rps *rps, u32 val);
u32 intel_rps_get_rp0_frequency(struct intel_rps *rps);
u32 intel_rps_get_rp1_frequency(struct intel_rps *rps);
u32 intel_rps_get_rpn_frequency(struct intel_rps *rps);
-u32 intel_rps_read_punit_req(struct intel_rps *rps);
u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps);
u32 intel_rps_read_rpstat(struct intel_rps *rps);
u32 intel_rps_read_rpstat_fw(struct intel_rps *rps);
--
2.38.0
next prev parent reply other threads:[~2023-03-08 5:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-08 5:33 [Intel-gfx] [PATCH 0/3] drm/i915/pmu: Use common freq functions with sysfs Ashutosh Dixit
2023-03-08 5:33 ` [Intel-gfx] [PATCH 1/3] drm/i915/rps: Expose read_actual_frequency_fw for PMU Ashutosh Dixit
2023-03-08 5:33 ` Ashutosh Dixit [this message]
2023-03-08 5:33 ` [Intel-gfx] [PATCH 3/3] drm/i915/pmu: Use common freq functions with sysfs Ashutosh Dixit
2023-03-08 6:12 ` Belgaumkar, Vinay
2023-03-09 3:53 ` Dixit, Ashutosh
2023-03-08 6:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2023-03-09 18:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230308053321.939906-3-ashutosh.dixit@intel.com \
--to=ashutosh.dixit@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox