public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 04/12] drm/i915/perf: Validate OA sseu config outside switch
Date: Wed, 15 Mar 2023 17:09:24 -0700	[thread overview]
Message-ID: <20230316000932.2525744-5-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20230316000932.2525744-1-umesh.nerlige.ramappa@intel.com>

Once OA supports media engine class:instance, the engine can only be
validated outside the switch since class and instance parameters are
separate entities. Since OA sseu config depends on engine
class:instance, validate OA sseu config outside the switch.

v2: (Ashutosh)
- Clarify commit message
- Use drm_dbg instead of DRM_DEBUG
- Reorder stack variables

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 drivers/gpu/drm/i915/i915_perf.c | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index b0e1acbe90fc..1229f65534e2 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -3950,7 +3950,9 @@ static int read_properties_unlocked(struct i915_perf *perf,
 				    u32 n_props,
 				    struct perf_open_properties *props)
 {
+	struct drm_i915_gem_context_param_sseu user_sseu;
 	u64 __user *uprop = uprops;
+	bool config_sseu = false;
 	u32 i;
 	int ret;
 
@@ -4079,8 +4081,6 @@ static int read_properties_unlocked(struct i915_perf *perf,
 			props->hold_preemption = !!value;
 			break;
 		case DRM_I915_PERF_PROP_GLOBAL_SSEU: {
-			struct drm_i915_gem_context_param_sseu user_sseu;
-
 			if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 50)) {
 				drm_dbg(&perf->i915->drm,
 					"SSEU config not supported on gfx %x\n",
@@ -4095,14 +4095,7 @@ static int read_properties_unlocked(struct i915_perf *perf,
 					"Unable to copy global sseu parameter\n");
 				return -EFAULT;
 			}
-
-			ret = get_sseu_config(&props->sseu, props->engine, &user_sseu);
-			if (ret) {
-				drm_dbg(&perf->i915->drm,
-					"Invalid SSEU configuration\n");
-				return ret;
-			}
-			props->has_sseu = true;
+			config_sseu = true;
 			break;
 		}
 		case DRM_I915_PERF_PROP_POLL_OA_PERIOD:
@@ -4122,6 +4115,16 @@ static int read_properties_unlocked(struct i915_perf *perf,
 		uprop += 2;
 	}
 
+	if (config_sseu) {
+		ret = get_sseu_config(&props->sseu, props->engine, &user_sseu);
+		if (ret) {
+			drm_dbg(&perf->i915->drm,
+				"Invalid SSEU configuration\n");
+			return ret;
+		}
+		props->has_sseu = true;
+	}
+
 	return 0;
 }
 
-- 
2.36.1


  parent reply	other threads:[~2023-03-16  0:10 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-16  0:09 [Intel-gfx] [PATCH v5 00/12] Add OAM support for MTL Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 01/12] drm/i915/perf: Drop wakeref on GuC RC error Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 02/12] drm/i915/mtl: Synchronize i915/BIOS on C6 enabling Umesh Nerlige Ramappa
2023-03-16 16:06   ` Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 03/12] drm/i915/perf: Add helper to check supported OA engines Umesh Nerlige Ramappa
2023-03-16  0:09 ` Umesh Nerlige Ramappa [this message]
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 05/12] drm/i915/perf: Group engines into respective OA groups Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 06/12] drm/i915/perf: Fail modprobe if i915_perf_init fails on OOM Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 07/12] drm/i915/perf: Parse 64bit report header formats correctly Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 08/12] drm/i915/perf: Handle non-power-of-2 reports Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 09/12] drm/i915/perf: Add engine class instance parameters to perf Umesh Nerlige Ramappa
2023-03-16  5:31   ` Dixit, Ashutosh
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 10/12] drm/i915/perf: Add support for OA media units Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 11/12] drm/i915/perf: Pass i915 object to perf revision helper Umesh Nerlige Ramappa
2023-03-16  0:09 ` [Intel-gfx] [PATCH v5 12/12] drm/i915/perf: Wa_14017512683: Disable OAM if media C6 is enabled in BIOS Umesh Nerlige Ramappa
2023-03-16  0:13 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Add OAM support for MTL Patchwork
2023-03-16  0:14 ` [Intel-gfx] [PATCH v5 00/12] " Umesh Nerlige Ramappa

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230316000932.2525744-5-umesh.nerlige.ramappa@intel.com \
    --to=umesh.nerlige.ramappa@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox