From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 6/6] drm/i915/vrr: Allow VRR to be toggled during fastsets
Date: Mon, 20 Mar 2023 22:33:52 +0200 [thread overview]
Message-ID: <20230320203352.19515-7-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230320203352.19515-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Now that VRR enable/disable are called from convenient places
it is trivial to allow it to change state during fastsets.
Make it so.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7542
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index cefd9f2e1331..07743b2d2ef0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5849,7 +5849,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(splitter.link_count);
PIPE_CONF_CHECK_I(splitter.pixel_overlap);
- PIPE_CONF_CHECK_BOOL(vrr.enable);
+ if (!fastset)
+ PIPE_CONF_CHECK_BOOL(vrr.enable);
PIPE_CONF_CHECK_I(vrr.vmin);
PIPE_CONF_CHECK_I(vrr.vmax);
PIPE_CONF_CHECK_I(vrr.flipline);
--
2.39.2
next prev parent reply other threads:[~2023-03-20 20:34 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-20 20:33 [Intel-gfx] [PATCH 0/6] drm/i915/vrr: Allow fastset to enable/disable VRR Ville Syrjala
2023-03-20 20:33 ` [Intel-gfx] [PATCH 1/6] drm/i915: Generalize planes_{enabling, disabling}() Ville Syrjala
2023-04-05 7:31 ` Golani, Mitulkumar Ajitkumar
2023-03-20 20:33 ` [Intel-gfx] [PATCH 2/6] drm/i915/vrr: Eliminate redundant function arguments Ville Syrjala
2023-04-05 6:58 ` Golani, Mitulkumar Ajitkumar
2023-03-20 20:33 ` [Intel-gfx] [PATCH 3/6] drm/i915/vrr: Make delayed vblank operational in VRR mode on adl/dg2 Ville Syrjala
2023-04-05 7:05 ` Golani, Mitulkumar Ajitkumar
2023-03-20 20:33 ` [Intel-gfx] [PATCH 4/6] drm/i915/vrr: Tell intel_crtc_update_active_timings() about VRR explicitly Ville Syrjala
2023-04-05 7:10 ` Golani, Mitulkumar Ajitkumar
2023-03-20 20:33 ` [Intel-gfx] [PATCH 5/6] drm/i915/vrr: Relocate VRR enable/disable Ville Syrjala
2023-03-21 13:56 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-03-27 20:05 ` Golani, Mitulkumar Ajitkumar
2023-04-11 5:41 ` Ville Syrjälä
2023-04-12 7:45 ` Ville Syrjälä
2023-04-12 14:14 ` Golani, Mitulkumar Ajitkumar
2023-04-12 14:16 ` Golani, Mitulkumar Ajitkumar
2023-04-12 15:05 ` Ville Syrjälä
2023-04-12 14:11 ` Golani, Mitulkumar Ajitkumar
2023-04-12 14:20 ` Ville Syrjälä
2023-03-20 20:33 ` Ville Syrjala [this message]
2023-04-05 7:27 ` [Intel-gfx] [PATCH 6/6] drm/i915/vrr: Allow VRR to be toggled during fastsets Golani, Mitulkumar Ajitkumar
2023-03-21 12:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/vrr: Allow fastset to enable/disable VRR Patchwork
2023-03-21 12:50 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-21 12:50 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-21 13:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-03-21 15:34 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915/vrr: Allow fastset to enable/disable VRR (rev2) Patchwork
2023-03-21 15:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: " Patchwork
2023-03-21 15:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-21 15:34 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-21 15:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-21 21:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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