From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 6/6] drm/i915/psr: Implement Display WA #1136
Date: Wed, 22 Mar 2023 12:34:12 +0200 [thread overview]
Message-ID: <20230322103412.123943-7-jouni.hogander@intel.com> (raw)
In-Reply-To: <20230322103412.123943-1-jouni.hogander@intel.com>
Implement Display WA #1136 for SKL/BXT.
Bspec: 21664
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 17 +++++++++++++++++
drivers/gpu/drm/i915/display/skl_watermark.c | 5 -----
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index b53c71c06105..24c3f75bb9d8 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1950,6 +1950,7 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state,
/*
* Wa_16013835468
* Wa_14015648006
+ * Display WA #1136: skl, bxt
*/
static void wm_optimization_wa(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
@@ -1957,6 +1958,17 @@ static void wm_optimization_wa(struct intel_dp *intel_dp,
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
bool set_wa_bit = false;
+ /*
+ * Display WA #1136: skl, bxt
+ * skl/bxt do not have chicken bit: disable PSR
+ */
+ if (DISPLAY_VER(dev_priv) <= 9) {
+ if (crtc_state->wm_level_disabled &&
+ intel_dp->psr.enabled)
+ intel_psr_disable_locked(intel_dp);
+ return;
+ }
+
/* Wa_14015648006 */
if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||
IS_DISPLAY_VER(dev_priv, 11, 13))
@@ -1999,12 +2011,17 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
keep_disabled |= psr->sink_not_reliable;
keep_disabled |= !crtc_state->active_planes;
+ /* Display WA #1136: skl, bxt */
+ keep_disabled |= DISPLAY_VER(dev_priv) <= 9 &&
+ crtc_state->wm_level_disabled;
+
if (!psr->enabled && !keep_disabled)
intel_psr_enable_locked(intel_dp, crtc_state);
/*
* Wa_16013835468
* Wa_14015648006
+ * Display WA #1136: skl, bxt
*/
wm_optimization_wa(intel_dp, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index afb751c024ba..ced61da8b496 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2278,11 +2278,6 @@ static int skl_wm_check_vblank(struct intel_crtc_state *crtc_state)
*/
crtc_state->wm_level_disabled = level < i915->display.wm.num_levels - 1;
- /*
- * FIXME also related to skl+ w/a 1136 (also unimplemented as of
- * now) perhaps?
- */
-
for (level++; level < i915->display.wm.num_levels; level++) {
enum plane_id plane_id;
--
2.34.1
next prev parent reply other threads:[~2023-03-22 10:34 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-22 10:34 [Intel-gfx] [PATCH v5 0/6] High refresh rate PSR fixes Jouni Högander
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 1/6] drm/i915/psr: Unify pre/post hooks Jouni Högander
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 2/6] drm/i915/psr: Modify/fix Wa_16013835468 and prepare for Wa_14015648006 Jouni Högander
2023-03-28 11:17 ` Ville Syrjälä
2023-03-28 11:31 ` Hogander, Jouni
2023-03-28 11:40 ` Ville Syrjälä
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 3/6] drm/i915/psr: Implement Wa_14015648006 Jouni Högander
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 4/6] drm/i915/psr: Add helpers for block count number handling Jouni Högander
2023-03-28 11:19 ` Ville Syrjälä
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 5/6] drm/i915/psr: Check that vblank is long enough for psr2 Jouni Högander
2023-03-28 11:24 ` Ville Syrjälä
2023-03-28 11:33 ` Hogander, Jouni
2023-03-22 10:34 ` Jouni Högander [this message]
2023-03-28 11:26 ` [Intel-gfx] [PATCH v5 6/6] drm/i915/psr: Implement Display WA #1136 Ville Syrjälä
2023-03-28 11:35 ` Hogander, Jouni
2023-03-22 13:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for High refresh rate PSR fixes (rev5) Patchwork
2023-03-22 13:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-22 13:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-22 18:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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