public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: fei.yang@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/9] drm/i915/mtl: Set has_llc=0
Date: Mon, 10 Apr 2023 21:26:05 -0700	[thread overview]
Message-ID: <20230411042613.3178711-2-fei.yang@intel.com> (raw)
In-Reply-To: <20230411042613.3178711-1-fei.yang@intel.com>

From: Fei Yang <fei.yang@intel.com>

On MTL, GT is no longer allocated on LLC, set has_llc=0.

Signed-off-by: Fei Yang <fei.yang@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index cddb6e197972..025d32c0b161 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1146,6 +1146,7 @@ static const struct intel_device_info mtl_info = {
 	.has_flat_ccs = 0,
 	.has_gmd_id = 1,
 	.has_guc_deprivilege = 1,
+	.has_llc = 0,
 	.has_mslice_steering = 0,
 	.has_snoop = 1,
 	.__runtime.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
-- 
2.25.1


  reply	other threads:[~2023-04-11  4:25 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-11  4:26 [Intel-gfx] [PATCH 0/9] drm/i915/mtl: Define MOCS and PAT tables for MTL fei.yang
2023-04-11  4:26 ` fei.yang [this message]
2023-04-11  4:26 ` [Intel-gfx] [PATCH 2/9] " fei.yang
2023-04-11  4:26 ` [Intel-gfx] [PATCH 3/9] drm/i915/mtl: Add PTE encode function fei.yang
2023-04-11  4:26 ` [Intel-gfx] [PATCH 4/9] drm/i915/mtl: workaround coherency issue for Media fei.yang
2023-04-11  4:26 ` [Intel-gfx] [PATCH 5/9] drm/i915/mtl: end support for set caching ioctl fei.yang
2023-04-11  4:26 ` [Intel-gfx] [PATCH 6/9] drm/i915: preparation for using PAT index fei.yang
2023-04-11  4:26 ` [Intel-gfx] [PATCH 7/9] drm/i915: use pat_index instead of cache_level fei.yang
2023-04-11  4:26 ` [Intel-gfx] [PATCH 8/9] drm/i915: making mtl pte encode generic for gen12 fei.yang
2023-04-11  4:26 ` [Intel-gfx] [PATCH 9/9] drm/i915: Allow user to set cache at BO creation fei.yang
2023-04-11  4:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Define MOCS and PAT tables for MTL (rev3) Patchwork
2023-04-11  4:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-11  5:05 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-04-14  6:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Define MOCS and PAT tables for MTL (rev4) Patchwork
2023-04-14  6:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-14 11:23 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230411042613.3178711-2-fei.yang@intel.com \
    --to=fei.yang@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox