From: Tejas Upadhyay <tejas.upadhyay@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris.p.wilson@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915/gem: Use large rings for compute contexts
Date: Tue, 16 May 2023 17:43:45 +0530 [thread overview]
Message-ID: <20230516121345.1036399-1-tejas.upadhyay@intel.com> (raw)
From: Chris Wilson <chris.p.wilson@intel.com>
Allow compute contexts to submit the maximal amount of work without
blocking userspace.
The original size for user LRC ring's (SZ_16K) was chosen to minimise
memory consumption, without being so small as to frequently stall in the
middle of workloads. With the main consumers being GL / media pipelines
of 2 or 3 batches per frame, we want to support ~10 requests in flight
to allow for the application to control throttling without stalling
within a frame.
Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 5402a7bbcb1d..0edb7be6fa5e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -965,6 +965,8 @@ static int intel_context_set_gem(struct intel_context *ce,
GEM_BUG_ON(intel_context_is_pinned(ce));
ce->ring_size = SZ_16K;
+ if (ce->engine->class == COMPUTE_CLASS)
+ ce->ring_size = SZ_512K;
i915_vm_put(ce->vm);
ce->vm = i915_gem_context_get_eb_vm(ctx);
--
2.25.1
next reply other threads:[~2023-05-16 12:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-16 12:13 Tejas Upadhyay [this message]
2023-05-16 12:31 ` [Intel-gfx] [PATCH] drm/i915/gem: Use large rings for compute contexts Jani Nikula
2023-05-16 14:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2023-05-16 20:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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