From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Make intel_get_crtc_scanline use no trace hw reads
Date: Tue, 13 Jun 2023 14:52:45 -0700 [thread overview]
Message-ID: <20230613215245.1551145-5-radhakrishna.sripada@intel.com> (raw)
In-Reply-To: <20230613215245.1551145-1-radhakrishna.sripada@intel.com>
intel_get_crtc_scanline is used in the display tracing infrastructure.
Use no trace hw reads to avoid nested tracing calls.
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
drivers/gpu/drm/i915/display/intel_vblank.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 55f3389fa220..0b8574b29f1c 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -150,17 +150,17 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
* pipe frame time stamp. The time stamp value
* is sampled at every start of vertical blank.
*/
- scan_prev_time = intel_de_read_fw(dev_priv,
- PIPE_FRMTMSTMP(crtc->pipe));
+ scan_prev_time = intel_de_read_fw_notrace(dev_priv,
+ PIPE_FRMTMSTMP(crtc->pipe));
/*
* The TIMESTAMP_CTR register has the current
* time stamp value.
*/
- scan_curr_time = intel_de_read_fw(dev_priv, IVB_TIMESTAMP_CTR);
+ scan_curr_time = intel_de_read_fw_notrace(dev_priv, IVB_TIMESTAMP_CTR);
- scan_post_time = intel_de_read_fw(dev_priv,
- PIPE_FRMTMSTMP(crtc->pipe));
+ scan_post_time = intel_de_read_fw_notrace(dev_priv,
+ PIPE_FRMTMSTMP(crtc->pipe));
} while (scan_post_time != scan_prev_time);
return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
@@ -217,7 +217,7 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
vtotal /= 2;
- position = intel_de_read_fw(dev_priv, PIPEDSL(pipe)) & PIPEDSL_LINE_MASK;
+ position = intel_de_read_fw_notrace(dev_priv, PIPEDSL(pipe)) & PIPEDSL_LINE_MASK;
/*
* On HSW, the DSL reg (0x70000) appears to return 0 if we
@@ -236,7 +236,8 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
for (i = 0; i < 100; i++) {
udelay(1);
- temp = intel_de_read_fw(dev_priv, PIPEDSL(pipe)) & PIPEDSL_LINE_MASK;
+ temp = intel_de_read_fw_notrace(dev_priv, PIPEDSL(pipe)) &
+ PIPEDSL_LINE_MASK;
if (temp != position) {
position = temp;
break;
--
2.34.1
next prev parent reply other threads:[~2023-06-13 21:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-13 21:52 [Intel-gfx] [PATCH 0/4] Use non traceable api in display trace code Radhakrishna Sripada
2023-06-13 21:52 ` [Intel-gfx] [PATCH 1/4] drm/i915: Add a notrace version of intel_de_read_fw Radhakrishna Sripada
2023-06-13 21:52 ` [Intel-gfx] [PATCH 2/4] drm/i915: Add a dummy notrace version of intel_de_read64_2x32 Radhakrishna Sripada
2023-06-13 21:52 ` [Intel-gfx] [PATCH 3/4] drm/i915: Make intel_crtc_get_vblank_counter use no trace hw reads Radhakrishna Sripada
2023-06-22 19:41 ` Lucas De Marchi
2023-06-22 21:50 ` Sripada, Radhakrishna
2023-06-13 21:52 ` Radhakrishna Sripada [this message]
2023-06-14 1:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Use non traceable api in display trace code Patchwork
2023-06-14 1:04 ` philly j
2023-06-14 1:05 ` philly j
2023-06-14 1:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-06-14 7:37 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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