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From: Andi Shyti <andi.shyti@linux.intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
	Matt Roper <matthew.d.roper@intel.com>,
	Chris Wilson <chris@chris-wilson.co.uk>
Cc: Intel GFX <intel-gfx@lists.freedesktop.org>
Subject: [Intel-gfx] [PATCH RESEND 0/2] Update AUX invalidation sequence
Date: Fri, 23 Jun 2023 12:22:18 +0200	[thread overview]
Message-ID: <20230623102220.343937-1-andi.shyti@linux.intel.com> (raw)

Hi,

as there are new hardware directives, we need a little
adaptation for the AUX invalidation sequence.

This series was already proposed in the past but received no
comment. Respinning it again :)

Andi

Jonathan Cavitt (2):
  drm/i915/gt: Ensure memory quiesced before invalidation
  drm/i915/gt: Poll aux invalidation register bit on invalidation

 drivers/gpu/drm/i915/gt/gen8_engine_cs.c     | 24 ++++++++++++++++----
 drivers/gpu/drm/i915/gt/intel_gpu_commands.h |  1 +
 2 files changed, 21 insertions(+), 4 deletions(-)

-- 
2.40.1


             reply	other threads:[~2023-06-23 10:23 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-23 10:22 Andi Shyti [this message]
2023-06-23 10:22 ` [Intel-gfx] [PATCH RESEND 1/2] drm/i915/gt: Ensure memory quiesced before invalidation Andi Shyti
2023-06-23 10:22 ` [Intel-gfx] [PATCH RESEND 2/2] drm/i915/gt: Poll aux invalidation register bit on invalidation Andi Shyti
2023-06-23 12:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Update AUX invalidation sequence Patchwork
2023-06-23 17:14 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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