Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Andi Shyti <andi.shyti@linux.intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: [Intel-gfx] [PATCH 3/3] drm/i915: Enable GGTT blitting in MTL
Date: Fri, 18 Aug 2023 21:42:49 +0200	[thread overview]
Message-ID: <20230818194249.1014022-4-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20230818194249.1014022-1-andi.shyti@linux.intel.com>

From: Nirmoy Das <nirmoy.das@intel.com>

MTL can hang because of a HW bug while parallel reading/writing
from/to LMEM/GTTMMADR BAR so try to reduce GGTT update
related pci transactions with blitter command as recommended
for Wa_22018444074.

To issue blitter commands, the driver must be primed to receive
requests. Maintain blitter-based GGTT update disablement until driver
probing completes. Moreover, implement a temporary disablement
of blitter prior to entering suspend, followed by re-enablement
post-resume. This is acceptable as those transition periods are
mostly single threaded.

v2: Disable GGTT blitter prior to runtime suspend and re-enable
after runtime resume.

Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Oak Zeng <oak.zeng@intel.com>
---
 drivers/gpu/drm/i915/i915_driver.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index ec4d26b3c17cc..a893a5e8496ef 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -812,6 +812,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	i915_welcome_messages(i915);
 
 	i915->do_release = true;
+	intel_engine_blitter_context_set_ready(to_gt(i915), true);
 
 	return 0;
 
@@ -852,6 +853,7 @@ void i915_driver_remove(struct drm_i915_private *i915)
 {
 	intel_wakeref_t wakeref;
 
+	intel_engine_blitter_context_set_ready(to_gt(i915), false);
 	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
 
 	i915_driver_unregister(i915);
@@ -1074,6 +1076,8 @@ static int i915_drm_suspend(struct drm_device *dev)
 	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
 	pci_power_t opregion_target_state;
 
+	intel_engine_blitter_context_set_ready(to_gt(dev_priv), false);
+
 	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
 	/* We do a lot of poking in a lot of registers, make sure they work
@@ -1261,6 +1265,7 @@ static int i915_drm_resume(struct drm_device *dev)
 	intel_gvt_resume(dev_priv);
 
 	enable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
+	intel_engine_blitter_context_set_ready(to_gt(dev_priv), true);
 
 	return 0;
 }
@@ -1512,6 +1517,7 @@ static int intel_runtime_suspend(struct device *kdev)
 	if (drm_WARN_ON_ONCE(&dev_priv->drm, !HAS_RUNTIME_PM(dev_priv)))
 		return -ENODEV;
 
+	intel_engine_blitter_context_set_ready(to_gt(dev_priv), false);
 	drm_dbg(&dev_priv->drm, "Suspending device\n");
 
 	disable_rpm_wakeref_asserts(rpm);
@@ -1666,6 +1672,8 @@ static int intel_runtime_resume(struct device *kdev)
 	else
 		drm_dbg(&dev_priv->drm, "Device resumed\n");
 
+	intel_engine_blitter_context_set_ready(to_gt(dev_priv), true);
+
 	return ret;
 }
 
-- 
2.40.1


  parent reply	other threads:[~2023-08-18 19:43 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-18 19:42 [Intel-gfx] [PATCH 1/3] drm/i915: Create a blitter context for GGTT updates Andi Shyti
2023-08-18 19:42 ` [Intel-gfx] [CI] drm/i915/gt: Refactor hangcheck selftest to use igt_spinner Andi Shyti
2023-08-18 19:42 ` [Intel-gfx] [PATCH 2/3] drm/i915: Implement GGTT update method with blitter Andi Shyti
2023-08-19 22:49   ` Andi Shyti
2023-08-18 19:42 ` Andi Shyti [this message]
2023-08-18 20:05 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [CI] drm/i915/gt: Refactor hangcheck selftest to use igt_spinner (rev2) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-08-22 15:28 [Intel-gfx] [PATCH 1/3] drm/i915: Create a blitter context for GGTT updates Oak Zeng
2023-08-22 15:28 ` [Intel-gfx] [PATCH 3/3] drm/i915: Enable GGTT blitting in MTL Oak Zeng
2023-08-24 15:53   ` Matt Roper
2023-08-24 20:40     ` Zeng, Oak
2023-08-24 21:03 [Intel-gfx] [PATCH 1/3] drm/i915: Create a bind context for GGTT updates Oak Zeng
2023-08-24 21:03 ` [Intel-gfx] [PATCH 3/3] drm/i915: Enable GGTT blitting in MTL Oak Zeng

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230818194249.1014022-4-andi.shyti@linux.intel.com \
    --to=andi.shyti@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jonathan.cavitt@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox