Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v4 1/4] drm/i915/fbc: Clear frontbuffer busy bits on flip
Date: Fri,  1 Sep 2023 12:34:57 +0300	[thread overview]
Message-ID: <20230901093500.3463046-2-jouni.hogander@intel.com> (raw)
In-Reply-To: <20230901093500.3463046-1-jouni.hogander@intel.com>

We are planning to move flush performed from work queue. This
means it is possible to have invalidate -> flip -> flush sequence.
Handle this by clearing possible busy bits on flip.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 1c6d467cec26..817e5784660b 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1307,11 +1307,9 @@ static void __intel_fbc_post_update(struct intel_fbc *fbc)
 	lockdep_assert_held(&fbc->lock);
 
 	fbc->flip_pending = false;
+	fbc->busy_bits = 0;
 
-	if (!fbc->busy_bits)
-		intel_fbc_activate(fbc);
-	else
-		intel_fbc_deactivate(fbc, "frontbuffer write");
+	intel_fbc_activate(fbc);
 }
 
 void intel_fbc_post_update(struct intel_atomic_state *state,
-- 
2.34.1


  reply	other threads:[~2023-09-01  9:35 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-01  9:34 [Intel-gfx] [PATCH v4 0/4] Handle dma fences in dirtyfb ioctl Jouni Högander
2023-09-01  9:34 ` Jouni Högander [this message]
2023-09-04  7:25   ` [Intel-gfx] [PATCH v4 1/4] drm/i915/fbc: Clear frontbuffer busy bits on flip Coelho, Luciano
2023-09-04  8:40     ` Hogander, Jouni
2023-09-04  8:52       ` Coelho, Luciano
2023-09-01  9:34 ` [Intel-gfx] [PATCH v4 2/4] drm/i915/psr: " Jouni Högander
2023-09-01  9:34 ` [Intel-gfx] [PATCH v4 3/4] drm/i915: Add new frontbuffer tracking interface to queue flush Jouni Högander
2023-09-01  9:35 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Handle dma fences in dirtyfb callback Jouni Högander
2023-09-01 11:09 ` [Intel-gfx] [PATCH v4 0/4] Handle dma fences in dirtyfb ioctl Ville Syrjälä
2023-09-04  9:34   ` Hogander, Jouni
2023-09-01 14:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Handle dma fences in dirtyfb ioctl (rev6) Patchwork
2023-09-01 15:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-02  0:16 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-04  5:22   ` Hogander, Jouni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230901093500.3463046-2-jouni.hogander@intel.com \
    --to=jouni.hogander@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox