From: Pekka Paalanen <pekka.paalanen@haloniitty.fi>
To: "Garg, Nemesa" <nemesa.garg@intel.com>
Cc: Simon Ser <contact@emersion.fr>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"G M, Adarsh" <adarsh.g.m@intel.com>
Subject: Re: [RFC 0/5] Introduce drm sharpening property
Date: Fri, 16 Feb 2024 10:36:20 +0200 [thread overview]
Message-ID: <20240216103620.33deabb1@eldfell> (raw)
In-Reply-To: <IA1PR11MB6467A91412978DE0FFCAB50FE34C2@IA1PR11MB6467.namprd11.prod.outlook.com>
[-- Attachment #1: Type: text/plain, Size: 2564 bytes --]
On Fri, 16 Feb 2024 04:28:41 +0000
"Garg, Nemesa" <nemesa.garg@intel.com> wrote:
> It is not intel specific and the goal is to have a generic API for
> configuring Sharpness, accessible to various vendors. Intel currently
> offers sharpness support through the Display Engine, while other
> vendors seem to support Sharpness through the GPU using GL shaders
> (Vulcan/Open GL based).
Do you mean that all vendors use the exact same mathematical algorithm
(with only differences in operation precision at most)?
If yes, good.
If not, then we need to know where exactly in the virtual KMS color
pipeline the operation happens, whether this can be generic or not.
Does this also work the same regardless of pixel formats, dynamic
range, color gamut, transfer functions etc. on both plane input and
connector output configurations?
> In terms of sharpness intensity adjustment, the plan is to provide
> users with the ability to customize and regulate sharpness levels. We
> suggest setting a minimum and maximum strength range from 1 to 255,
> where a value of 0 signifies that the sharpness feature is disabled,
> indicated by a u8 data type. For now we have mapped the strength
> value 0.0 to 14.9375 to 0-239 but as the datatype is u8 user can give
> value upto 255 which is gets clamped to 239.
Naturally you will need to document all that, so that all drivers and
vendors do the exact same thing.
I did not see any actual documentation in the patch series yet, e.g. a
reference to a specific algorithm.
As Ville pointed out, there was also no specification at which point of
the virtual color pipeline this operation will apply. Before/after
DEGAMMA/CTM/GAMMA/scaling in plane/blending/CRTC?
Is the property being added to the list in
https://dri.freedesktop.org/docs/drm/gpu/drm-kms.html#standard-crtc-properties
or where-ever it belongs?
Thanks,
pq
> We are also open to have alternative scales, such as 1-100 or 1-10,
> as long as a general consensus is reached within the community
> comprising OEMs and vendors.
>
> > -----Original Message-----
> > From: Simon Ser <contact@emersion.fr>
> > Sent: Thursday, February 15, 2024 2:03 PM
> > To: Garg, Nemesa <nemesa.garg@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> > Subject: Re: [RFC 0/5] Introduce drm sharpening property
> >
> > How much of this is Intel-specific? Are there any hardware vendors
> > with a similar feature? How much is the "sharpness" knob tied to
> > Intel hardware?
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2024-02-16 8:36 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-14 11:24 [RFC 0/5] Introduce drm sharpening property Nemesa Garg
2024-02-14 11:24 ` [RFC 1/5] drm: Introduce sharpeness mode property Nemesa Garg
2024-02-14 11:24 ` [RFC 2/5] drm/i915/display/: Compute the scaler filter coefficients Nemesa Garg
2024-02-14 11:24 ` [RFC 3/5] drm/i915/dispaly/: Enable the second scaler Nemesa Garg
2024-02-14 11:24 ` [RFC 4/5] drm/i915/display/: Add registers and compute the strength Nemesa Garg
2024-02-14 11:24 ` [RFC 5/5] drm/i915/display: Load the lut values and enable sharpness Nemesa Garg
2024-02-14 12:22 ` ✗ Fi.CI.CHECKPATCH: warning for Introduce drm sharpening property Patchwork
2024-02-14 12:22 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-02-14 12:42 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-02-15 8:33 ` [RFC 0/5] " Simon Ser
2024-02-16 4:28 ` Garg, Nemesa
2024-02-16 8:36 ` Pekka Paalanen [this message]
2024-03-04 14:04 ` Garg, Nemesa
2024-03-04 14:15 ` Simon Ser
2024-03-12 8:30 ` Garg, Nemesa
2024-03-12 14:26 ` Pekka Paalanen
2024-03-13 9:36 ` Pekka Paalanen
2024-03-27 7:11 ` Garg, Nemesa
2024-03-27 11:29 ` Pekka Paalanen
2024-03-28 10:04 ` Pekka Paalanen
2024-06-19 11:23 ` Garg, Nemesa
2024-02-15 16:37 ` Harry Wentland
2024-02-15 16:48 ` Ville Syrjälä
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240216103620.33deabb1@eldfell \
--to=pekka.paalanen@haloniitty.fi \
--cc=adarsh.g.m@intel.com \
--cc=contact@emersion.fr \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=nemesa.garg@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox