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From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, jani.nikula@intel.com,
	ankit.k.nautiyal@intel.com,
	Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Subject: [PATCH v11 4/8] drm/i915/display/dp: Add wrapper function to check AS SDP
Date: Wed, 28 Feb 2024 19:44:08 +0530	[thread overview]
Message-ID: <20240228141412.2761101-5-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20240228141412.2761101-1-mitulkumar.ajitkumar.golani@intel.com>

Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
 drivers/gpu/drm/i915/display/intel_dp.c             | 8 ++++++++
 drivers/gpu/drm/i915/display/intel_dp.h             | 1 +
 3 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index fe4268813786..6399fbc6c738 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -68,6 +68,7 @@ struct drm_printer;
 #define HAS_TRANSCODER(i915, trans)	((DISPLAY_RUNTIME_INFO(i915)->cpu_transcoder_mask & \
 					  BIT(trans)) != 0)
 #define HAS_VRR(i915)			(DISPLAY_VER(i915) >= 11)
+#define HAS_AS_SDP(i915)		(DISPLAY_VER(i915) >= 13)
 #define INTEL_NUM_PIPES(i915)		(hweight8(DISPLAY_RUNTIME_INFO(i915)->pipe_mask))
 #define I915_HAS_HOTPLUG(i915)		(DISPLAY_INFO(i915)->has_hotplug)
 #define OVERLAY_NEEDS_PHYSICAL(i915)	(DISPLAY_INFO(i915)->overlay_needs_physical)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e5377cdc71c6..7eb83924f3fe 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -120,6 +120,14 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
 	return dig_port->base.type == INTEL_OUTPUT_EDP;
 }
 
+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+	return HAS_AS_SDP(i915) &&
+		drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd);
+}
+
 static void intel_dp_unset_edid(struct intel_dp *intel_dp);
 
 /* Is link rate UHBR and thus 128b/132b? */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 530cc97bc42f..cc5e069091ff 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -80,6 +80,7 @@ void intel_dp_audio_compute_config(struct intel_encoder *encoder,
 				   struct drm_connector_state *conn_state);
 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
 bool intel_dp_is_edp(struct intel_dp *intel_dp);
+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp);
 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
 int intel_dp_link_symbol_size(int rate);
 int intel_dp_link_symbol_clock(int rate);
-- 
2.25.1


  parent reply	other threads:[~2024-02-28 14:21 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-28 14:14 [PATCH v11 0/8] Enable Adaptive Sync SDP Support for DP Mitul Golani
2024-02-28 14:14 ` [PATCH v11 1/8] drm/dp: Add support to indicate if sink supports AS SDP Mitul Golani
2024-02-28 14:14 ` [PATCH v11 2/8] drm: Add Adaptive Sync SDP logging Mitul Golani
2024-02-28 14:14 ` [PATCH v11 3/8] drm/i915/dp: Add Read/Write support for Adaptive Sync SDP Mitul Golani
2024-02-28 14:14 ` Mitul Golani [this message]
2024-02-28 14:14 ` [PATCH v11 5/8] drm/i915/display: Compute AS SDP parameters Mitul Golani
2024-02-28 14:14 ` [PATCH v11 6/8] drm/i915/display: Add state checker for Adaptive Sync SDP Mitul Golani
2024-02-28 14:14 ` [PATCH v11 7/8] drm/i915/display: Compute vrr_vsync params Mitul Golani
2024-02-28 14:14 ` [PATCH v11 8/8] drm/i915/display: Read/Write AS sdp only when sink/source has enabled Mitul Golani

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