From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Mika Kahola" <mika.kahola@intel.com>,
"Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH 3/5] drm/i915/display/intel_psr: Fix intel_psr2_sel_fetch_et_alignment usage
Date: Tue, 19 Mar 2024 14:33:25 +0200 [thread overview]
Message-ID: <20240319123327.1661097-4-jouni.hogander@intel.com> (raw)
In-Reply-To: <20240319123327.1661097-1-jouni.hogander@intel.com>
Currently we are not aligning selective update area to cover cursor fully
when cursor is not updated by itself but still in the selective update
area. Fix this by checking cursor separately after
drm_atomic_add_affected_planes.
Bspec: 68927
Fixes: 1bff93b8bc27 ("drm/i915/psr: Extend SU area to cover cursor fully if needed")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 55 ++++++++++++++----------
1 file changed, 33 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 961f92d10241..e1a9399aa503 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2140,21 +2140,36 @@ static void intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st
* cursor fully when cursor is in SU area.
*/
static void
-intel_psr2_sel_fetch_et_alignment(struct intel_crtc_state *crtc_state,
- struct intel_plane_state *cursor_state)
+intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct drm_rect inter;
+ struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+ struct intel_plane_state *new_plane_state;
+ struct intel_plane *plane;
+ int i;
- if (!crtc_state->enable_psr2_su_region_et ||
- !cursor_state->uapi.visible)
+ if (!crtc_state->enable_psr2_su_region_et)
return;
- inter = crtc_state->psr2_su_area;
- if (!drm_rect_intersect(&inter, &cursor_state->uapi.dst))
- return;
+ for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {
+ struct drm_rect inter;
- clip_area_update(&crtc_state->psr2_su_area, &cursor_state->uapi.dst,
- &crtc_state->pipe_src);
+ if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc)
+ continue;
+
+ if (plane->id != PLANE_CURSOR)
+ continue;
+
+ if (!new_plane_state->uapi.visible)
+ continue;
+
+ inter = crtc_state->psr2_su_area;
+ if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst))
+ continue;
+
+ clip_area_update(&crtc_state->psr2_su_area, &new_plane_state->uapi.dst,
+ &crtc_state->pipe_src);
+ }
}
/*
@@ -2197,8 +2212,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_plane_state *new_plane_state, *old_plane_state,
- *cursor_plane_state = NULL;
+ struct intel_plane_state *new_plane_state, *old_plane_state;
struct intel_plane *plane;
bool full_update = false;
int i, ret;
@@ -2283,13 +2297,6 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1;
clip_area_update(&crtc_state->psr2_su_area, &damaged_area, &crtc_state->pipe_src);
-
- /*
- * Cursor plane new state is stored to adjust su area to cover
- * cursor are fully.
- */
- if (plane->id == PLANE_CURSOR)
- cursor_plane_state = new_plane_state;
}
/*
@@ -2318,9 +2325,13 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
if (ret)
return ret;
- /* Adjust su area to cover cursor fully as necessary */
- if (cursor_plane_state)
- intel_psr2_sel_fetch_et_alignment(crtc_state, cursor_plane_state);
+ /*
+ * Adjust su area to cover cursor fully as necessary (early
+ * transport). This needs to be done after
+ * drm_atomic_add_affected_planes to ensure visible cursor is added into
+ * affected planes even when cursor is not updated by itself.
+ */
+ intel_psr2_sel_fetch_et_alignment(state, crtc);
intel_psr2_sel_fetch_pipe_alignment(crtc_state);
--
2.34.1
next prev parent reply other threads:[~2024-03-19 12:33 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-19 12:33 [PATCH 0/5] Wa_16021440873 and early transport fixes Jouni Högander
2024-03-19 12:33 ` [PATCH 1/5] drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT value Jouni Högander
2024-03-27 13:05 ` Kahola, Mika
2024-03-19 12:33 ` [PATCH 2/5] drm/i915/psr: Move writing early transport pipe src Jouni Högander
2024-03-27 13:06 ` Kahola, Mika
2024-03-19 12:33 ` Jouni Högander [this message]
2024-03-28 9:25 ` [PATCH 3/5] drm/i915/display/intel_psr: Fix intel_psr2_sel_fetch_et_alignment usage Kahola, Mika
2024-03-19 12:33 ` [PATCH 4/5] drm/i915/display: Add definition for MCURSOR_MODE_64_2B Jouni Högander
2024-03-28 9:29 ` Kahola, Mika
2024-03-19 12:33 ` [PATCH 5/5] drm/i915/display: Implement Wa_16021440873 Jouni Högander
2024-03-28 12:57 ` Kahola, Mika
2024-03-28 13:19 ` Hogander, Jouni
2024-03-19 21:40 ` ✗ Fi.CI.SPARSE: warning for Wa_16021440873 and early transport fixes Patchwork
2024-03-19 21:58 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-03-20 8:03 ` ✗ Fi.CI.SPARSE: warning for Wa_16021440873 and early transport fixes (rev2) Patchwork
2024-03-20 8:16 ` ✓ Fi.CI.BAT: success " Patchwork
2024-03-20 18:39 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-03-28 13:01 ` Hogander, Jouni
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