From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Manasi Navare" <navaremanasi@chromium.org>,
"Arun R Murthy" <arun.r.murthy@intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Subject: [PATCH v3 6/6] drm/i915: Allow bigjoiner for MST
Date: Tue, 9 Apr 2024 19:35:02 +0300 [thread overview]
Message-ID: <20240409163502.29633-7-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20240409163502.29633-1-ville.syrjala@linux.intel.com>
From: Vidya Srinivas <vidya.srinivas@intel.com>
We need bigjoiner support with MST functionality
for MST monitor resolutions > 5K to work.
Adding support for the same.
v2: Addressed review comments from Jani.
Revert rejection of MST bigjoiner modes and add
functionality
v3: Fixed pipe_mismatch WARN for mst_master_transcoder
Credits-to: Manasi Navare <navaremanasi@chromium.org>
v4: Utilize intel_crtc_joined_pipe_mask() also for handling
bigjoiner slave pipes for MST case(Stan)
[v5: vsyrjala: chunked the modeset squence stuff out,
removed bogus mst master transcoder hack,
keep mgr_lock near the full_pbn check]
[v6: vsyrjala: Calculate DSC slices correctly for bigjoiner (Imre)]
Reviewed-by: Manasi Navare <navaremanasi@chromium.org>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Co-developed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 28 +++++++++++----------
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b1c95e04a45c..9084641e33f5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -88,11 +88,10 @@ static int intel_dp_mst_bw_overhead(const struct intel_crtc_state *crtc_state,
if (dsc) {
flags |= DRM_DP_BW_OVERHEAD_DSC;
- /* TODO: add support for bigjoiner */
dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
adjusted_mode->clock,
adjusted_mode->hdisplay,
- false);
+ crtc_state->bigjoiner_pipes);
}
overhead = drm_dp_bw_overhead(crtc_state->lane_count,
@@ -525,6 +524,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
+ struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
struct intel_dp *intel_dp = &intel_mst->primary->dp;
struct intel_connector *connector =
@@ -542,6 +542,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
return -EINVAL;
+ if (intel_dp_need_bigjoiner(intel_dp, connector,
+ adjusted_mode->crtc_hdisplay,
+ adjusted_mode->crtc_clock))
+ pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe);
+
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->has_pch_encoder = false;
@@ -1341,10 +1346,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
max_link_clock, max_lanes);
mode_rate = intel_dp_link_required(mode->clock, min_bpp);
- ret = drm_modeset_lock(&mgr->base.lock, ctx);
- if (ret)
- return ret;
-
/*
* TODO:
* - Also check if compression would allow for the mode
@@ -1357,17 +1358,18 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
* corresponding link capabilities of the sink) in case the
* stream is uncompressed for it by the last branch device.
*/
- if (mode_rate > max_rate || mode->clock > max_dotclk ||
- drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) {
- *status = MODE_CLOCK_HIGH;
- return 0;
- }
if (intel_dp_need_bigjoiner(intel_dp, intel_connector,
mode->hdisplay, target_clock)) {
bigjoiner = true;
max_dotclk *= 2;
+ }
- /* TODO: add support for bigjoiner */
+ ret = drm_modeset_lock(&mgr->base.lock, ctx);
+ if (ret)
+ return ret;
+
+ if (mode_rate > max_rate || mode->clock > max_dotclk ||
+ drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) {
*status = MODE_CLOCK_HIGH;
return 0;
}
@@ -1410,7 +1412,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
return 0;
}
- *status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
+ *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner);
return 0;
}
--
2.43.2
next prev parent reply other threads:[~2024-04-09 16:35 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-09 16:34 [PATCH v3 0/6] drm/i915: Bigjoiner modeset sequence redesign and MST support Ville Syrjala
2024-04-09 16:34 ` [PATCH v3 1/6] drm/i915: Extract intel_ddi_post_disable_hdmi_or_sst() Ville Syrjala
2024-04-09 16:34 ` [PATCH v3 2/6] drm/i915: Utilize intel_crtc_joined_pipe_mask() more Ville Syrjala
2024-04-09 16:34 ` [PATCH v3 3/6] drm/i915: Handle joined pipes inside hsw_crtc_disable() Ville Syrjala
2024-04-09 16:35 ` [PATCH v3 4/6] drm/i915: Handle joined pipes inside hsw_crtc_enable() Ville Syrjala
2024-04-09 16:35 ` [PATCH v3 5/6] drm/i915/mst: Add bigjoiner handling to MST modeset sequence Ville Syrjala
2024-04-09 16:35 ` Ville Syrjala [this message]
2024-04-09 17:52 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Bigjoiner modeset sequence redesign and MST support (rev4) Patchwork
2024-04-09 17:52 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-04-09 18:12 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-04-10 14:34 ` Ville Syrjälä
2024-04-10 15:36 ` Ville Syrjälä
2024-04-11 7:07 ` Illipilli, TejasreeX
2024-04-11 6:45 ` ✓ Fi.CI.BAT: success " Patchwork
2024-04-11 14:28 ` ✗ Fi.CI.IGT: failure " Patchwork
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