From: Andi Shyti <andi.shyti@linux.intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel <dri-devel@lists.freedesktop.org>
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
Andi Shyti <andi.shyti@linux.intel.com>
Subject: [PATCH v1 09/14] drm/i915/gt: Expose the number of total CCS slices
Date: Wed, 21 Aug 2024 14:43:44 +0200 [thread overview]
Message-ID: <20240821124349.295259-10-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20240821124349.295259-1-andi.shyti@linux.intel.com>
Implement a sysfs interface to show the number of available CCS
slices. The displayed number does not take into account the CCS
balancing mode.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 21 +++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 1 +
drivers/gpu/drm/i915/gt/intel_gt_sysfs.c | 2 ++
3 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
index f0319278a5fc..ed3ad881a89d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
@@ -5,7 +5,9 @@
#include "i915_drv.h"
#include "intel_gt_ccs_mode.h"
+#include "intel_gt_print.h"
#include "intel_gt_regs.h"
+#include "intel_gt_sysfs.h"
static void intel_gt_apply_ccs_mode(struct intel_gt *gt)
{
@@ -95,3 +97,22 @@ void intel_gt_ccs_mode_init(struct intel_gt *gt)
/* Initialize the CCS mode setting */
intel_gt_apply_ccs_mode(gt);
}
+
+static ssize_t num_cslices_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = kobj_to_gt(&dev->kobj);
+ u32 num_slices;
+
+ num_slices = hweight32(CCS_MASK(gt));
+
+ return sysfs_emit(buff, "%u\n", num_slices);
+}
+static DEVICE_ATTR_RO(num_cslices);
+
+void intel_gt_sysfs_ccs_init(struct intel_gt *gt)
+{
+ if (sysfs_create_file(>->sysfs_gt, &dev_attr_num_cslices.attr))
+ gt_warn(gt, "Failed to create sysfs num_cslices files\n");
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h
index 4a6763b95a78..9696cc9017f6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h
@@ -9,5 +9,6 @@
#include "intel_gt.h"
void intel_gt_ccs_mode_init(struct intel_gt *gt);
+void intel_gt_sysfs_ccs_init(struct intel_gt *gt);
#endif /* __INTEL_GT_CCS_MODE_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
index 33cba406b569..895eedc402ae 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
@@ -12,6 +12,7 @@
#include "i915_drv.h"
#include "i915_sysfs.h"
#include "intel_gt.h"
+#include "intel_gt_ccs_mode.h"
#include "intel_gt_print.h"
#include "intel_gt_sysfs.h"
#include "intel_gt_sysfs_pm.h"
@@ -101,6 +102,7 @@ void intel_gt_sysfs_register(struct intel_gt *gt)
goto exit_fail;
intel_gt_sysfs_pm_init(gt, >->sysfs_gt);
+ intel_gt_sysfs_ccs_init(gt);
return;
--
2.45.2
next prev parent reply other threads:[~2024-08-21 12:45 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-21 12:43 [PATCH v1 00/14] CCS static load balance Andi Shyti
2024-08-21 12:43 ` [PATCH v1 01/14] drm/i915/gt: Avoid using masked workaround for CCS_MODE setting Andi Shyti
2024-08-21 12:43 ` [PATCH v1 02/14] drm/i915/gt: Move the CCS mode variable to a global position Andi Shyti
2024-08-21 12:43 ` [PATCH v1 03/14] drm/i915/gt: Allow the creation of multi-mode CCS masks Andi Shyti
2024-08-21 12:43 ` [PATCH v1 04/14] drm/i915/gt: Refactor uabi engine class/instance list creation Andi Shyti
2024-08-21 12:43 ` [PATCH v1 05/14] drm/i915/gem: Mark and verify UABI engine validity Andi Shyti
2024-08-21 12:43 ` [PATCH v1 06/14] drm/i915/gt: Introduce for_each_enabled_engine() and apply it in selftests Andi Shyti
2024-08-21 12:43 ` [PATCH v1 07/14] drm/i915/gt: Manage CCS engine creation within UABI exposure Andi Shyti
2024-08-21 12:43 ` [PATCH v1 08/14] drm/i915/gt: Remove cslices mask value from the CCS structure Andi Shyti
2024-08-21 12:43 ` Andi Shyti [this message]
2024-08-21 12:43 ` [PATCH v1 10/14] drm/i915/gt: Store engine-related sysfs kobjects Andi Shyti
2024-08-21 12:43 ` [PATCH v1 11/14] drm/i915/gt: Store active CCS mask Andi Shyti
2024-08-21 12:43 ` [PATCH v1 12/14] drm/i915/gt: Isolate single sysfs engine file creation Andi Shyti
2024-08-21 12:43 ` [PATCH v1 13/14] drm/i915/gt: Implement creation and removal routines for CCS engines Andi Shyti
2024-08-21 12:43 ` [PATCH v1 14/14] drm/i915/gt: Allow the user to change the CCS mode through sysfs Andi Shyti
2024-08-21 13:25 ` ✗ Fi.CI.CHECKPATCH: warning for CCS static load balance (rev3) Patchwork
2024-08-21 13:26 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-08-21 13:33 ` ✓ Fi.CI.BAT: success " Patchwork
2024-08-21 15:59 ` ✗ Fi.CI.IGT: failure " Patchwork
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