From: Andi Shyti <andi.shyti@linux.intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>,
dri-devel <dri-devel@lists.freedesktop.org>
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>,
Tvrtko Ursulin <tursulin@ursulin.net>,
Andi Shyti <andi.shyti@linux.intel.com>
Subject: [PATCH v2 01/15] drm/i915/gt: Avoid using masked workaround for CCS_MODE setting
Date: Thu, 22 Aug 2024 19:28:18 +0200 [thread overview]
Message-ID: <20240822172832.494994-2-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20240822172832.494994-1-andi.shyti@linux.intel.com>
When setting the CCS mode, we mistakenly used wa_masked_en() to
apply the workaround, which reads from the register and masks the
existing value with the new one.
Our intention was to write the value directly, without masking
it.
So far, this hasn't caused issues because we've been using a
register value that only enables a single CCS engine, typically
with an ID of '0'.
However, in upcoming patches, we will be utilizing multiple
engines, and it's crucial that we write the new value directly
without any masking.
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index bfe6d8fc820f..f3082fad3f45 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2745,7 +2745,7 @@ static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_li
* assign all slices to a single CCS. We will call it CCS mode 1
*/
mode = intel_gt_apply_ccs_mode(gt);
- wa_masked_en(wal, XEHP_CCS_MODE, mode);
+ wa_add(wal, XEHP_CCS_MODE, 0, mode, mode, false);
}
/*
--
2.45.2
next prev parent reply other threads:[~2024-08-22 17:28 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-22 17:28 [PATCH v2 00/15] CCS static load balance Andi Shyti
2024-08-22 17:28 ` Andi Shyti [this message]
2024-08-22 17:28 ` [PATCH v2 02/15] drm/i915/gt: Move the CCS mode variable to a global position Andi Shyti
2024-08-22 17:28 ` [PATCH v2 03/15] drm/i915/gt: Allow the creation of multi-mode CCS masks Andi Shyti
2024-08-22 17:28 ` [PATCH v2 04/15] drm/i915/gt: Refactor uabi engine class/instance list creation Andi Shyti
2024-08-22 17:28 ` [PATCH v2 05/15] drm/i915/gem: Mark and verify UABI engine validity Andi Shyti
2024-08-22 17:28 ` [PATCH v2 06/15] drm/i915/gt: Introduce for_each_enabled_engine() and apply it in selftests Andi Shyti
2024-08-22 17:28 ` [PATCH v2 07/15] drm/i915/gt: Manage CCS engine creation within UABI exposure Andi Shyti
2024-08-22 17:28 ` [PATCH v2 08/15] drm/i915/gt: Remove cslices mask value from the CCS structure Andi Shyti
2024-08-22 17:28 ` [PATCH v2 09/15] drm/i915/gt: Expose the number of total CCS slices Andi Shyti
2024-08-22 17:28 ` [PATCH v2 10/15] drm/i915/gt: Store engine-related sysfs kobjects Andi Shyti
2024-08-22 17:28 ` [PATCH v2 11/15] drm/i915/gt: Store active CCS mask Andi Shyti
2024-08-22 17:28 ` [PATCH v2 12/15] drm/i915: Protect access to the UABI engines list with a mutex Andi Shyti
2024-08-22 17:28 ` [PATCH v2 13/15] drm/i915/gt: Isolate single sysfs engine file creation Andi Shyti
2024-08-22 17:28 ` [PATCH v2 14/15] drm/i915/gt: Implement creation and removal routines for CCS engines Andi Shyti
2024-08-22 17:28 ` [PATCH v2 15/15] drm/i915/gt: Allow the user to change the CCS mode through sysfs Andi Shyti
2024-08-22 18:00 ` ✗ Fi.CI.CHECKPATCH: warning for CCS static load balance (rev4) Patchwork
2024-08-22 18:00 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-08-22 18:18 ` ✗ Fi.CI.BAT: failure " Patchwork
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