From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 7/7] drm/i915: Rename variables in ilk_intermedidate_wm()
Date: Mon, 16 Sep 2024 19:24:13 +0300 [thread overview]
Message-ID: <20240916162413.8555-8-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20240916162413.8555-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
ilk_compute_intermediate_wm() uses rather poor variable names
for its watermark structs. Borrow a better naming convention
from the g4x/vlv counterpart code.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 35 +++++++++++++++-----------
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index cfc487563c25..fc928307d062 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -2993,8 +2993,9 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
- struct intel_pipe_wm *a = &new_crtc_state->wm.ilk.intermediate;
- const struct intel_pipe_wm *b = &old_crtc_state->wm.ilk.optimal;
+ struct intel_pipe_wm *intermediate = &new_crtc_state->wm.ilk.intermediate;
+ const struct intel_pipe_wm *optimal = &new_crtc_state->wm.ilk.optimal;
+ const struct intel_pipe_wm *active = &old_crtc_state->wm.ilk.optimal;
int level;
/*
@@ -3002,25 +3003,29 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
* currently active watermarks to get values that are safe both before
* and after the vblank.
*/
- *a = new_crtc_state->wm.ilk.optimal;
+ *intermediate = *optimal;
if (!new_crtc_state->hw.active ||
intel_crtc_needs_modeset(new_crtc_state) ||
state->skip_intermediate_wm)
return 0;
- a->pipe_enabled |= b->pipe_enabled;
- a->sprites_enabled |= b->sprites_enabled;
- a->sprites_scaled |= b->sprites_scaled;
+ intermediate->pipe_enabled |= active->pipe_enabled;
+ intermediate->sprites_enabled |= active->sprites_enabled;
+ intermediate->sprites_scaled |= active->sprites_scaled;
for (level = 0; level < dev_priv->display.wm.num_levels; level++) {
- struct intel_wm_level *a_wm = &a->wm[level];
- const struct intel_wm_level *b_wm = &b->wm[level];
+ struct intel_wm_level *intermediate_wm = &intermediate->wm[level];
+ const struct intel_wm_level *active_wm = &active->wm[level];
- a_wm->enable &= b_wm->enable;
- a_wm->pri_val = max(a_wm->pri_val, b_wm->pri_val);
- a_wm->spr_val = max(a_wm->spr_val, b_wm->spr_val);
- a_wm->cur_val = max(a_wm->cur_val, b_wm->cur_val);
- a_wm->fbc_val = max(a_wm->fbc_val, b_wm->fbc_val);
+ intermediate_wm->enable &= active_wm->enable;
+ intermediate_wm->pri_val = max(intermediate_wm->pri_val,
+ active_wm->pri_val);
+ intermediate_wm->spr_val = max(intermediate_wm->spr_val,
+ active_wm->spr_val);
+ intermediate_wm->cur_val = max(intermediate_wm->cur_val,
+ active_wm->cur_val);
+ intermediate_wm->fbc_val = max(intermediate_wm->fbc_val,
+ active_wm->fbc_val);
}
/*
@@ -3029,14 +3034,14 @@ static int ilk_compute_intermediate_wm(struct intel_atomic_state *state,
* there's no safe way to transition from the old state to
* the new state, so we need to fail the atomic transaction.
*/
- if (!ilk_validate_pipe_wm(dev_priv, a))
+ if (!ilk_validate_pipe_wm(dev_priv, intermediate))
return -EINVAL;
/*
* If our intermediate WM are identical to the final WM, then we can
* omit the post-vblank programming; only update if it's different.
*/
- if (memcmp(a, &new_crtc_state->wm.ilk.optimal, sizeof(*a)) != 0)
+ if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0)
new_crtc_state->wm.need_postvbl_update = true;
return 0;
--
2.44.2
next prev parent reply other threads:[~2024-09-16 16:24 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-16 16:24 [PATCH 0/7] drm/i915: Some wm/cxsr cleanups Ville Syrjala
2024-09-16 16:24 ` [PATCH 1/7] drm/i915: Remove leftover intel_sprite_set_colorkey_ioctl() prototype Ville Syrjala
2024-09-22 9:31 ` Govindapillai, Vinod
2024-09-23 21:58 ` Ville Syrjälä
2024-09-16 16:24 ` [PATCH 2/7] drm/i915: Combine .compute_{pipe, intermediate}_wm() into one Ville Syrjala
2024-09-22 9:49 ` Govindapillai, Vinod
2024-09-16 16:24 ` [PATCH 3/7] drm/i915: Extract ilk_must_disable_lp_wm() Ville Syrjala
2024-09-16 16:24 ` [PATCH 4/7] drm/i915: Clean up intel_wm_need_update() Ville Syrjala
2024-09-22 9:54 ` Govindapillai, Vinod
2024-09-22 10:34 ` Govindapillai, Vinod
2024-09-23 17:33 ` Ville Syrjälä
2024-09-16 16:24 ` [PATCH 5/7] drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wm Ville Syrjala
2024-09-22 10:40 ` Govindapillai, Vinod
2024-09-23 17:35 ` Ville Syrjälä
2024-09-23 21:59 ` Ville Syrjälä
2024-09-24 6:07 ` Govindapillai, Vinod
2024-09-16 16:24 ` [PATCH 6/7] drm/i915: s/disable_lp_wm/disable_cxsr/ Ville Syrjala
2024-09-22 10:46 ` Govindapillai, Vinod
2024-09-16 16:24 ` Ville Syrjala [this message]
2024-09-22 10:50 ` [PATCH 7/7] drm/i915: Rename variables in ilk_intermedidate_wm() Govindapillai, Vinod
2024-09-16 22:11 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some wm/cxsr cleanups Patchwork
2024-09-16 22:11 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-09-16 22:35 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-09-18 21:09 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Some wm/cxsr cleanups (rev2) Patchwork
2024-09-18 21:09 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-09-18 21:18 ` ✓ Fi.CI.BAT: success " Patchwork
2024-09-19 8:31 ` ✗ Fi.CI.IGT: failure " Patchwork
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